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CD4029價(jià)格
參考價(jià)格：￥24.3197
型號(hào)：CD4029BCN 品牌：National 備注：這里有CD4029多少錢，2025年最近7天走勢(shì)，今日出價(jià)，今日競(jìng)價(jià)，CD4029批發(fā)/采購報(bào)價(jià)，CD4029行情走勢(shì)銷售排行榜，CD4029報(bào)價(jià)。| 型號(hào) | 功能描述 | 生產(chǎn)廠家 企業(yè) | LOGO | 操作 |
|---|---|---|---|---|
CD4029 | Presettable Binary/Decade Up/Down Counter General Description The CD4029BC is a presettable up/down counter which counts in either binary or decade mode depending on the voltage level applied at binary/decade input. When binary/decade is at logical “1”, the counter counts in binary, other wise it counts in decade. Similarly, the counte | FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司 |   | |
CD4029 | CMOS Presettable Up/Down Counter Description CD4029BMS consists of a four-stage binary or BCD-decade up/down counter with provisions for look-ahead carry in both counting modes. Features ? High-Voltage Type (20V Rating) ? Medium Speed Operation: 8MHz (Typ.) at CL = 50pF and VDD - VSS = 10V ? Multi-Package Paralle | Intersil | | |
CD4029 | CMOS Presettable Up/Down Counter Features High-Voltage Type (20V Rating) Medium Speed Operation: 8MHz (Typ.) at CL = 50pF and VDD - VSS = 10V Multi-Package Parallel Clocking for Synchronous High Speed Output Response or Ripple Clocking for Slow Clock Input Rise and Fall Times “Preset Enable” and Individual “Jam” Inputs Pro | SYC | | |
CD4029 | Presettable Binary/Decade Up/Down Counter 文件：164.2 Kbytes Page：8 Pages | NSCNational Semiconductor (TI) 美國國家半導(dǎo)體美國國家半導(dǎo)體公司 | | |
CD4029 | Presettable Binary/Decade Up/Down Counter 文件：164.21 Kbytes Page：8 Pages | NSCNational Semiconductor (TI) 美國國家半導(dǎo)體美國國家半導(dǎo)體公司 | | |
CD4029 | CMOS Presettable Up/Down Counter | RENESAS 瑞薩 | | |
CD4029 | CMOS PRESETTABLE UP/DOWN COUNTER | TI 德州儀器 | | |
CD4029 | Presettable Binary/Decade Up/Down Counter | ONSEMI 安森美半導(dǎo)體 | | |
CD4029 | CMOS PRESETTABLE UP/DOWN COUNTER 文件：302.49 Kbytes Page：7 Pages | TI 德州儀器 | | |
CD4029 | CMOS PRESETTABLE UP/DOWN COUNTER 文件：1.03602 Mbytes Page：18 Pages | TI 德州儀器 | | |
CMOS Presettable Up/Down Counter Features: ? Medium-speed operation . . . 8 MHz (typ.) @Cy_ = 50 pF and Vpp—Vgg = 10 V # Multi-package parallel clocking for synchronous high speed output response or ripple clocking for slow clock input rise and fall times = “Preset Enable” and individual “Jam” inputs provided ? Binary or d | TI 德州儀器 | | ||
Presettable Binary/Decade Up/Down Counter General Description The CD4029BC is a presettable up/down counter which counts in either binary or decade mode depending on the voltage level applied at binary/decade input. When binary/decade is at logical “1”, the counter counts in binary, other wise it counts in decade. Similarly, the counte | FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司 | | ||
Presettable Binary/Decade Up/Down Counter General Description The CD4029BC is a presettable up/down counter which counts in either binary or decade mode depending on the voltage level applied at binary/decade input. When binary/decade is at logical “1”, the counter counts in binary, other wise it counts in decade. Similarly, the counte | FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司 | | ||
Presettable Binary/Decade Up/Down Counter General Description The CD4029BC is a presettable up/down counter which counts in either binary or decade mode depending on the voltage level applied at binary/decade input. When binary/decade is at logical “1”, the counter counts in binary, other wise it counts in decade. Similarly, the counte | FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司 | | ||
Presettable Binary/Decade Up/Down Counter General Description The CD4029BC is a presettable up/down counter which counts in either binary or decade mode depending on the voltage level applied at binary/decade input. When binary/decade is at logical “1”, the counter counts in binary, other wise it counts in decade. Similarly, the counte | FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司 | | ||
CMOS Presettable Up/Down Counter Features: ? Medium-speed operation . . . 8 MHz (typ.) @Cy_ = 50 pF and Vpp—Vgg = 10 V # Multi-package parallel clocking for synchronous high speed output response or ripple clocking for slow clock input rise and fall times = “Preset Enable” and individual “Jam” inputs provided ? Binary or d | TI 德州儀器 | | ||
CMOS Presettable Up/Down Counter Features: ? Medium-speed operation . . . 8 MHz (typ.) @Cy_ = 50 pF and Vpp—Vgg = 10 V # Multi-package parallel clocking for synchronous high speed output response or ripple clocking for slow clock input rise and fall times = “Preset Enable” and individual “Jam” inputs provided ? Binary or d | TI 德州儀器 | | ||
CMOS Presettable Up/Down Counter Features: ? Medium-speed operation . . . 8 MHz (typ.) @Cy_ = 50 pF and Vpp—Vgg = 10 V # Multi-package parallel clocking for synchronous high speed output response or ripple clocking for slow clock input rise and fall times = “Preset Enable” and individual “Jam” inputs provided ? Binary or d | TI 德州儀器 | | ||
CMOS Presettable Up/Down Counter Features: ? Medium-speed operation . . . 8 MHz (typ.) @Cy_ = 50 pF and Vpp—Vgg = 10 V # Multi-package parallel clocking for synchronous high speed output response or ripple clocking for slow clock input rise and fall times = “Preset Enable” and individual “Jam” inputs provided ? Binary or d | TI 德州儀器 | | ||
CMOS Presettable Up/Down Counter Features: ? Medium-speed operation . . . 8 MHz (typ.) @Cy_ = 50 pF and Vpp—Vgg = 10 V # Multi-package parallel clocking for synchronous high speed output response or ripple clocking for slow clock input rise and fall times = “Preset Enable” and individual “Jam” inputs provided ? Binary or d | TI 德州儀器 | | ||
CMOS Presettable Up/Down Counter Features: ? Medium-speed operation . . . 8 MHz (typ.) @Cy_ = 50 pF and Vpp—Vgg = 10 V # Multi-package parallel clocking for synchronous high speed output response or ripple clocking for slow clock input rise and fall times = “Preset Enable” and individual “Jam” inputs provided ? Binary or d | TI 德州儀器 | | ||
CMOS Presettable Up/Down Counter Features: ? Medium-speed operation . . . 8 MHz (typ.) @Cy_ = 50 pF and Vpp—Vgg = 10 V # Multi-package parallel clocking for synchronous high speed output response or ripple clocking for slow clock input rise and fall times = “Preset Enable” and individual “Jam” inputs provided ? Binary or d | TI 德州儀器 | | ||
CMOS Presettable Up/Down Counter Features: ? Medium-speed operation . . . 8 MHz (typ.) @Cy_ = 50 pF and Vpp—Vgg = 10 V # Multi-package parallel clocking for synchronous high speed output response or ripple clocking for slow clock input rise and fall times = “Preset Enable” and individual “Jam” inputs provided ? Binary or d | TI 德州儀器 | | ||
CMOS Presettable Up/Down Counter Features: ? Medium-speed operation . . . 8 MHz (typ.) @Cy_ = 50 pF and Vpp—Vgg = 10 V # Multi-package parallel clocking for synchronous high speed output response or ripple clocking for slow clock input rise and fall times = “Preset Enable” and individual “Jam” inputs provided ? Binary or d | TI 德州儀器 | | ||
CMOS Presettable Up/Down Counter Features: ? Medium-speed operation . . . 8 MHz (typ.) @Cy_ = 50 pF and Vpp—Vgg = 10 V # Multi-package parallel clocking for synchronous high speed output response or ripple clocking for slow clock input rise and fall times = “Preset Enable” and individual “Jam” inputs provided ? Binary or d | TI 德州儀器 | | ||
CMOS Presettable Up/Down Counter Features ? High-Voltage Type (20V Rating) ? Medium Speed Operation: 8MHz (Typ.) at CL = 50pF and VDD - VSS = 10V ? Multi-Package Parallel Clocking for Synchronous High Speed Output Response or Ripple Clocking for Slow Clock Input Rise and Fall Times ? “Preset Enable” and Individual “Jam” In | RENESAS 瑞薩 | | ||
CMOS Presettable Up/Down Counter Description CD4029BMS consists of a four-stage binary or BCD-decade up/down counter with provisions for look-ahead carry in both counting modes. Features ? High-Voltage Type (20V Rating) ? Medium Speed Operation: 8MHz (Typ.) at CL = 50pF and VDD - VSS = 10V ? Multi-Package Paralle | Intersil | | ||
CMOS Presettable Up/Down Counter Features: ? Medium-speed operation . . . 8 MHz (typ.) @Cy_ = 50 pF and Vpp—Vgg = 10 V # Multi-package parallel clocking for synchronous high speed output response or ripple clocking for slow clock input rise and fall times = “Preset Enable” and individual “Jam” inputs provided ? Binary or d | TI 德州儀器 | | ||
CMOS Presettable Up/Down Counter Features: ? Medium-speed operation . . . 8 MHz (typ.) @Cy_ = 50 pF and Vpp—Vgg = 10 V # Multi-package parallel clocking for synchronous high speed output response or ripple clocking for slow clock input rise and fall times = “Preset Enable” and individual “Jam” inputs provided ? Binary or d | TI 德州儀器 | | ||
CMOS Presettable Up/Down Counter Features: ? Medium-speed operation . . . 8 MHz (typ.) @Cy_ = 50 pF and Vpp—Vgg = 10 V # Multi-package parallel clocking for synchronous high speed output response or ripple clocking for slow clock input rise and fall times = “Preset Enable” and individual “Jam” inputs provided ? Binary or d | TI 德州儀器 | | ||
CMOS Presettable Up/Down Counter Features: ? Medium-speed operation . . . 8 MHz (typ.) @Cy_ = 50 pF and Vpp—Vgg = 10 V # Multi-package parallel clocking for synchronous high speed output response or ripple clocking for slow clock input rise and fall times = “Preset Enable” and individual “Jam” inputs provided ? Binary or d | TI 德州儀器 | | ||
CMOS PRESETTABLE UP/DOWN COUNTER 文件：1.03602 Mbytes Page：18 Pages | TI 德州儀器 | | ||
CMOS PRESETTABLE UP/DOWN COUNTER 文件：302.49 Kbytes Page：7 Pages | TI 德州儀器 | | ||
CMOS PRESETTABLE UP/DOWN COUNTER 文件：1.03602 Mbytes Page：18 Pages | TI 德州儀器 | | ||
Presettable Binary/Decade Up/Down Counter 文件：164.21 Kbytes Page：8 Pages | NSCNational Semiconductor (TI) 美國國家半導(dǎo)體美國國家半導(dǎo)體公司 | | ||
Presettable Binary/Decade Up/Down Counter 文件：164.2 Kbytes Page：8 Pages | NSCNational Semiconductor (TI) 美國國家半導(dǎo)體美國國家半導(dǎo)體公司 | | ||
Presettable Binary/Decade Up/Down Counter 文件：164.2 Kbytes Page：8 Pages | NSCNational Semiconductor (TI) 美國國家半導(dǎo)體美國國家半導(dǎo)體公司 | | ||
封裝/外殼：16-DIP（0.300"，7.62mm） 包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 描述：IC PRESET UP/DWN COUNTER 16-DIP 集成電路（IC） 計(jì)數(shù)器，除法器 | TI2 德州儀器 | | ||
CMOS PRESETTABLE UP/DOWN COUNTER 文件：302.49 Kbytes Page：7 Pages | TI 德州儀器 | | ||
CMOS PRESETTABLE UP/DOWN COUNTER 文件：1.03602 Mbytes Page：18 Pages | TI 德州儀器 | | ||
CMOS PRESETTABLE UP/DOWN COUNTER 文件：1.03602 Mbytes Page：18 Pages | TI 德州儀器 | | ||
CMOS PRESETTABLE UP/DOWN COUNTER 文件：302.49 Kbytes Page：7 Pages | TI 德州儀器 | | ||
封裝/外殼：16-DIP（0.300"，7.62mm） 包裝：管件 描述：IC PRESET UP/DWN COUNTER 16-DIP 集成電路（IC） 計(jì)數(shù)器，除法器 | TI2 德州儀器 | | ||
CMOS PRESETTABLE UP/DOWN COUNTER 文件：1.03602 Mbytes Page：18 Pages | TI 德州儀器 | | ||
CMOS PRESETTABLE UP/DOWN COUNTER 文件：302.49 Kbytes Page：7 Pages | TI 德州儀器 | | ||
CMOS PRESETTABLE UP/DOWN COUNTER 文件：1.03602 Mbytes Page：18 Pages | TI 德州儀器 | | ||
CMOS PRESETTABLE UP/DOWN COUNTER 文件：302.49 Kbytes Page：7 Pages | TI 德州儀器 | | ||
CMOS PRESETTABLE UP/DOWN COUNTER 文件：1.03602 Mbytes Page：18 Pages | TI 德州儀器 | | ||
CMOS PRESETTABLE UP/DOWN COUNTER 文件：302.49 Kbytes Page：7 Pages | TI 德州儀器 | | ||
CMOS PRESETTABLE UP/DOWN COUNTER 文件：1.03602 Mbytes Page：18 Pages | TI 德州儀器 | | ||
CMOS PRESETTABLE UP/DOWN COUNTER 文件：302.49 Kbytes Page：7 Pages | TI 德州儀器 | | ||
Presettable Binary/Decade Up/Down Counter 文件：164.21 Kbytes Page：8 Pages | NSCNational Semiconductor (TI) 美國國家半導(dǎo)體美國國家半導(dǎo)體公司 | | ||
Presettable Binary/Decade Up/Down Counter 文件：164.2 Kbytes Page：8 Pages | NSCNational Semiconductor (TI) 美國國家半導(dǎo)體美國國家半導(dǎo)體公司 | | ||
CMOS PRESETTABLE UP/DOWN COUNTER 文件：302.49 Kbytes Page：7 Pages | TI 德州儀器 | | ||
CMOS PRESETTABLE UP/DOWN COUNTER 文件：1.03602 Mbytes Page：18 Pages | TI 德州儀器 | | ||
CMOS PRESETTABLE UP/DOWN COUNTER 文件：302.49 Kbytes Page：7 Pages | TI 德州儀器 | | ||
CMOS PRESETTABLE UP/DOWN COUNTER 文件：1.03602 Mbytes Page：18 Pages | TI 德州儀器 | | ||
CMOS PRESETTABLE UP/DOWN COUNTER 文件：1.03602 Mbytes Page：18 Pages | TI 德州儀器 | | ||
Presettable Binary/Decade Up/Down Counter 文件：164.2 Kbytes Page：8 Pages | NSCNational Semiconductor (TI) 美國國家半導(dǎo)體美國國家半導(dǎo)體公司 | | ||
Presettable Binary/Decade Up/Down Counter 文件：164.2 Kbytes Page：8 Pages | NSCNational Semiconductor (TI) 美國國家半導(dǎo)體美國國家半導(dǎo)體公司 | |
| 替換型號(hào) | 功能描述 | 生產(chǎn)廠家 企業(yè) | LOGO | 操作 |
|---|---|---|---|---|
BINARY OR BCD DECADE PRESETTABLE UP/DOWN COUNTER | STMICROELECTRONICS 意法半導(dǎo)體 | STMICROELECTRONICS | | |
Synchronous up/down counter, binary/decade counter | Philips 飛利浦 | Philips | | |
Synchronous up/down counter, binary/decade counter | Philips 飛利浦 | Philips | | |
Synchronous up/down counter, binary/decade counter | Philips 飛利浦 | Philips | | |
Binary/Decade Up/Down Counter | Motorola 摩托羅拉 | Motorola | | |
Binary/Decade Up/Down Counter | ONSEMI 安森美半導(dǎo)體 | ONSEMI | | |
Binary/Decade Up/Down Counter | ONSEMI 安森美半導(dǎo)體 | ONSEMI | | |
Binary/Decade Up/Down Counter | Motorola 摩托羅拉 | Motorola | | |
PRESETTABLE UP/DOWN COUNTER | RANDER & E International, Inc. | RANDE | |
CD4029產(chǎn)品屬性
- 類型
描述
- 型號(hào)
CD4029
- 制造商
Fairchild Semiconductor Corporation
| IC供應(yīng)商 | 芯片型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
TI/德州儀器 |
25+ |
CDIP16 |
65248 |
百分百原裝現(xiàn)貨 實(shí)單必成 |
|||
TI |
16+ |
DIP |
330 |
一級(jí)代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
|||
TI |
2511 |
DIP-16 |
12800 |
電子元器件采購降本 30%!盈慧通原廠直采,砍掉中間差價(jià) |
|||
TI/德州儀器 |
24+ |
NA |
30000 |
房間原裝現(xiàn)貨特價(jià)熱賣,有單詳談 |
|||
CD4029BE |
4 |
4 |
|||||
TI |
2023+ |
DIP-16 |
6000 |
原裝正品現(xiàn)貨、支持第三方檢驗(yàn)、終端BOM表可配單提供 |
|||
TI |
23+ |
SO-16 |
5000 |
全新原裝,支持實(shí)單,非誠勿擾 |
|||
TI |
07+ |
CDIP |
25 |
進(jìn)口原裝公司現(xiàn)貨 |
|||
TI |
25+ |
DIP14 |
2200 |
絕對(duì)原裝!真實(shí)庫存! |
|||
TI/德州儀器 |
23+ |
TSSOP-16 |
9990 |
只有原裝 |
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CD4029規(guī)格書下載地址
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DdatasheetPDF頁碼索引
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