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CD4011價格
參考價格：￥3.9948
型號：CD40110BE 品牌：TEXAS 備注：這里有CD4011多少錢，2025年最近7天走勢，今日出價，今日競價，CD4011批發(fā)/采購報價，CD4011行情走勢銷售排行榜，CD4011報價。| 型號 | 功能描述 | 生產(chǎn)廠家&企業(yè) | LOGO | 操作 |
|---|---|---|---|---|
CD4011 | The CD4011 NAND gates provide the system designer with direct implementation of the NAND function Description The CD4011 NAND gates provide the system designer with direct implementation of the NAND function. Features ● Operating Voltage Range: 3.0 to 18 V ● Maximum input current of 1 at 18 V over full package- temperature range 100 nA at 18 V and 25 °C ● Noise margin (over full packa | TGS |   | |
CD4011 | SEMICONDUCTORS 文件：2.43533 Mbytes Page：31 Pages | etc2List of Unclassifed Manufacturers etc未分類制造商etc2未分類制造商 | | |
CD4011 | Quad 2-Input NOR,NAND Buffered B Series Gate 文件：167.6 Kbytes Page：6 Pages | NSCNational Semiconductor (TI) 美國國家半導(dǎo)體美國國家半導(dǎo)體公司 | | |
CD4011 | CMOS NAND GATES 文件：525.82 Kbytes Page：13 Pages | TI 德州儀器 | | |
CD4011 | Quad 2-Input NOR(NAND) Buffered B Series Gate 文件：164.76 Kbytes Page：6 Pages | NSCNational Semiconductor (TI) 美國國家半導(dǎo)體美國國家半導(dǎo)體公司 | | |
CMOS Decade Up-Down Counter/Latch/Display Driver Features Separate clock-up and clock-down lines Capable of driving common cathode LEDs and other displays directly Allows cascading without any external circuitry 100% tested for quiescent current at 20 V Maximum input current of 1 uA at 18 V over full package- temperatu | TI2 德州儀器 | | ||
CMOS Decade Up-Down Counter/Latch/Display Driver Features Separate clock-up and clock-down lines Capable of driving common cathode LEDs and other displays directly Allows cascading without any external circuitry 100% tested for quiescent current at 20 V Maximum input current of 1 uA at 18 V over full package- temperatu | TI2 德州儀器 | | ||
CMOS Decade Up-Down Counter/Latch/Display Driver Features Separate clock-up and clock-down lines Capable of driving common cathode LEDs and other displays directly Allows cascading without any external circuitry 100% tested for quiescent current at 20 V Maximum input current of 1 uA at 18 V over full package- temperatu | TI2 德州儀器 | | ||
CMOS HIGH-SPEED 8-BIT BIDIRECTIONAL CMOS/TTL INTERFACE LEVEL CONVERTER
| HARRIS | | ||
CMOS HIGH-SPEED 8-BIT BIDIRECTIONAL CMOS/TTL INTERFACE LEVEL CONVERTER
| HARRIS | | ||
Programmable Dual 4-Bit Terminator Features: One standard “8” output will drive eight terminator circuits. Will terminate a CMOS data bus with up to 40 B~series inputs inputs or 3-stats outputs connected at Vop of 5 V. Input terminals protected by standard “B series ESD protection network. Preserves final logic state. Outp | TI2 德州儀器 | | ||
Programmable Dual 4-Bit Terminator Features: One standard “8” output will drive eight terminator circuits. Will terminate a CMOS data bus with up to 40 B~series inputs inputs or 3-stats outputs connected at Vop of 5 V. Input terminals protected by standard “B series ESD protection network. Preserves final logic state. Outp | TI2 德州儀器 | | ||
Programmable Dual 4-Bit Terminator Features: One standard “8” output will drive eight terminator circuits. Will terminate a CMOS data bus with up to 40 B~series inputs inputs or 3-stats outputs connected at Vop of 5 V. Input terminals protected by standard “B series ESD protection network. Preserves final logic state. Outp | TI2 德州儀器 | | ||
CMOS NAND Gates Features: Quiescent current specified to 15 V Maximum input leakage of 1 uA at 15 V (full package-temperature range) 1-V noise margin (full package-temperature range) | TI2 德州儀器 | | ||
CMOS NAND Gates Features: Quiescent current specified to 15 V Maximum input leakage of 1 uA at 15 V (full package-temperature range) 1-V noise margin (full package-temperature range) | TI2 德州儀器 | | ||
CMOS NAND Gates Features: Quiescent current specified to 15 V Maximum input leakage of 1 uA at 15 V (full package-temperature range) 1-V noise margin (full package-temperature range) | TI2 德州儀器 | | ||
CMOS High Voltage Logic Features High Input Voltage up to 20V Symmetrical Output Characteristics Max input current 1μA at 18V over full Military Temperature Range Low Power TTL compatible Specified at 5V, 10V & 15V Direct drop-in replacement for obsolete components in long term programs. | SS | | ||
QUAD 2-INPUT NAND BUFFERED B SERIES GATE ■ DESCRIPTION The UTC CD4011B contains four independent 2-input NAND gates which perform the function Y=A B ? in positive logic. ■ FEATURES * 5V-10V-15V Parametric Ratings * Quad 2-Input NAND Gate * Symmetrical Output Characteristics * Maximum Input Current of 1uA at 15V Over Full Package Te | UTC 友順 | | ||
CMOS High Voltage Logic Features High Input Voltage up to 20V Symmetrical Output Characteristics Max input current 1μA at 18V over full Military Temperature Range Low Power TTL compatible Specified at 5V, 10V & 15V Direct drop-in replacement for obsolete components in long term programs. | SS | | ||
Quad 2-Input NOR Buffered B Series Gate . Quad 2-Input NAND Buffered B Series Gate General Description The CD4001BC and CD4011BC quad gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also | FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司 | | ||
Quad 2-Input NOR Buffered B Series Gate . Quad 2-Input NAND Buffered B Series Gate General Description The CD4001BC and CD4011BC quad gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also | FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司 | | ||
Quad 2-Input NOR Buffered B Series Gate . Quad 2-Input NAND Buffered B Series Gate General Description The CD4001BC and CD4011BC quad gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also | FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司 | | ||
Quad 2-Input NOR Buffered B Series Gate . Quad 2-Input NAND Buffered B Series Gate General Description The CD4001BC and CD4011BC quad gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also | FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司 | | ||
CMOS Quad 2-Input NAND Gate Intersil’s Satellite Applications FlowTM (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of | Intersil | | ||
QUAD 2-INPUT NAND BUFFERED B SERIES GATE ■ DESCRIPTION The UTC CD4011B contains four independent 2-input NAND gates which perform the function Y=A B ? in positive logic. ■ FEATURES * 5V-10V-15V Parametric Ratings * Quad 2-Input NAND Gate * Symmetrical Output Characteristics * Maximum Input Current of 1uA at 15V Over Full Package Te | UTC 友順 | | ||
CMOS Quad 2-Input NAND Gate Intersil’s Satellite Applications FlowTM (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of | Intersil | | ||
QUAD 2-INPUT NAND BUFFERED B SERIES GATE ■ DESCRIPTION The UTC CD4011B contains four independent 2-input NAND gates which perform the function Y=A B ? in positive logic. ■ FEATURES * 5V-10V-15V Parametric Ratings * Quad 2-Input NAND Gate * Symmetrical Output Characteristics * Maximum Input Current of 1uA at 15V Over Full Package Te | UTC 友順 | | ||
CMOS NAND Gates Description CD4011BMS, CD4012BMS, and CD4023BMS NAND gates provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered. CD4011BMS - Quad 2 Input CD4012BMS - Dual 4 Input CD4023BMS - Triple 3 I | Intersil | | ||
CMOS NAND Gates Features ? High-Voltage Types (20V Rating) ? Propagation Delay Time = 60ns (typ.) at CL = 50pF, VDD = 10V ? Buffered Inputs and Outputs ? Standardized Symmetrical Output Characteristics ? Maximum Input Current of 1?A at 18V Over Full PackageTemperature Range; 100nA at 18V and +25oC ? 100 Te | RENESAS 瑞薩 | | ||
CMOS Quad 2-Input NAND Gate Intersil’s Satellite Applications FlowTM (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of | Intersil | | ||
CMOS Quad 2-Input NAND Gate Features: Propagation delay time = 30 ns (typ). at CL=50pF, Vpp=10V Standardized symmetrical output characteristics = 100% tested for quiescent current at 20V Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 5.V, 10-V, and 15-V p | TI2 德州儀器 | | ||
CMOS Quad 2-Input NAND Gate Features: Propagation delay time = 30 ns (typ). at CL=50pF, Vpp=10V Standardized symmetrical output characteristics = 100% tested for quiescent current at 20V Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 5.V, 10-V, and 15-V p | TI2 德州儀器 | | ||
CMOS Quad 2-Input NAND Gate Features: Propagation delay time = 30 ns (typ). at CL=50pF, Vpp=10V Standardized symmetrical output characteristics = 100% tested for quiescent current at 20V Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 5.V, 10-V, and 15-V p | TI2 德州儀器 | | ||
CMOS Quad 2-Input NAND Gate Features: Propagation delay time = 30 ns (typ). at CL=50pF, Vpp=10V Standardized symmetrical output characteristics = 100% tested for quiescent current at 20V Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 5.V, 10-V, and 15-V p | TI2 德州儀器 | | ||
CMOS Quad 2-Input NAND Gate Features: Propagation delay time = 30 ns (typ). at CL=50pF, Vpp=10V Standardized symmetrical output characteristics = 100% tested for quiescent current at 20V Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 5.V, 10-V, and 15-V p | TI2 德州儀器 | | ||
CMOS Quad 2-Input NAND Gate Features: Propagation delay time = 30 ns (typ). at CL=50pF, Vpp=10V Standardized symmetrical output characteristics = 100% tested for quiescent current at 20V Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 5.V, 10-V, and 15-V p | TI2 德州儀器 | | ||
CMOS Quad 2-Input NAND Gate Features: Propagation delay time = 30 ns (typ). at CL=50pF, Vpp=10V Standardized symmetrical output characteristics = 100% tested for quiescent current at 20V Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 5.V, 10-V, and 15-V p | TI2 德州儀器 | | ||
CMOS Quad 2-Input NAND Gate Features: Propagation delay time = 30 ns (typ). at CL=50pF, Vpp=10V Standardized symmetrical output characteristics = 100% tested for quiescent current at 20V Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 5.V, 10-V, and 15-V p | TI2 德州儀器 | | ||
CMOS Quad 2-Input NAND Gate Features: Propagation delay time = 30 ns (typ). at CL=50pF, Vpp=10V Standardized symmetrical output characteristics = 100% tested for quiescent current at 20V Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 5.V, 10-V, and 15-V p | TI2 德州儀器 | | ||
CMOS Quad 2-Input NAND Gate Features: Propagation delay time = 30 ns (typ). at CL=50pF, Vpp=10V Standardized symmetrical output characteristics = 100% tested for quiescent current at 20V Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 5.V, 10-V, and 15-V p | TI2 德州儀器 | | ||
CMOS Quad 2-Input NAND Gate Features: Propagation delay time = 30 ns (typ). at CL=50pF, Vpp=10V Standardized symmetrical output characteristics = 100% tested for quiescent current at 20V Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 5.V, 10-V, and 15-V p | TI2 德州儀器 | | ||
CMOS Quad 2-Input NAND Gate Features: Propagation delay time = 30 ns (typ). at CL=50pF, Vpp=10V Standardized symmetrical output characteristics = 100% tested for quiescent current at 20V Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 5.V, 10-V, and 15-V p | TI2 德州儀器 | | ||
CMOS Quad 2-Input NAND Gate Features: Propagation delay time = 30 ns (typ). at CL=50pF, Vpp=10V Standardized symmetrical output characteristics = 100% tested for quiescent current at 20V Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 5.V, 10-V, and 15-V p | TI2 德州儀器 | | ||
CMOS Quad 2-Input NAND Gate Features: Propagation delay time = 30 ns (typ). at CL=50pF, Vpp=10V Standardized symmetrical output characteristics = 100% tested for quiescent current at 20V Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 5.V, 10-V, and 15-V p | TI2 德州儀器 | | ||
CMOS Quad 2-Input NAND Gate Features: Propagation delay time = 30 ns (typ). at CL=50pF, Vpp=10V Standardized symmetrical output characteristics = 100% tested for quiescent current at 20V Maximum input current of 1 uA at 18 V over full package temperature range; 100 nA at 18 V and 25°C = 5.V, 10-V, and 15-V p | TI2 德州儀器 | | ||
CMOS Decade Up-Down Counter/Latch/Display Driver 文件：338.41 Kbytes Page：10 Pages | SYC | | ||
CMOS DECADE UP-DOWN COUNTER/LATCH/DISPLAY DRIVER 文件：324.84 Kbytes Page：10 Pages | TI 德州儀器 | | ||
CMOS DECADE UP-DOWN COUNTER/LATCH/DISPLAY DRIVER 文件：324.84 Kbytes Page：10 Pages | TI 德州儀器 | | ||
CMOs Decade Up-Down Counter/Latch/Display Driver 文件：431.31 Kbytes Page：12 Pages | TI1 德州儀器 | | ||
CMOs Decade Up-Down Counter/Latch/Display Driver 文件：431.31 Kbytes Page：12 Pages | TI1 德州儀器 | | ||
CMOS Decade Up-Down Counter/Latch/Display Driver High-Voltage Type (20-V Rating) 文件：431.31 Kbytes Page：12 Pages | TI1 德州儀器 | | ||
CMOs Decade Up-Down Counter/Latch/Display Driver 文件：431.31 Kbytes Page：12 Pages | TI1 德州儀器 | | ||
CMOs Decade Up-Down Counter/Latch/Display Driver 文件：431.31 Kbytes Page：12 Pages | TI1 德州儀器 | | ||
CMOS NAND GATES 文件：253.47 Kbytes Page：4 Pages | SYC | | ||
PROGRAMMABLE DUAL 4-BIT TERMINATOR 文件：169.73 Kbytes Page：5 Pages | TI 德州儀器 | | ||
PROGRAMMABLE DUAL 4-BIT TERMINATOR 文件：169.73 Kbytes Page：5 Pages | TI 德州儀器 | | ||
Programmable Dual 4-Bit Terminator 文件：262.57 Kbytes Page：8 Pages | TI1 德州儀器 | | ||
Programmable Dual 4-Bit Terminator 文件：262.57 Kbytes Page：8 Pages | TI1 德州儀器 | | ||
封裝/外殼：14-DIP（0.300"，7.62mm） 包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 描述：IC TERMINATOR PROG DUAL 14-DIP 集成電路（IC） 專用邏輯器件 | TI2 德州儀器 | | ||
Programmable Dual 4-Bit Terminator 文件：262.57 Kbytes Page：8 Pages | TI1 德州儀器 | |
| 替換型號 | 功能描述 | 生產(chǎn)廠家&企業(yè) | LOGO | 操作 |
|---|---|---|---|---|
Quad 2-input NAND gate | ROHM 羅姆 | ROHM | | |
High Voltage CMOS Logic ICs | ROHM 羅姆 | ROHM | | |
High Voltage CMOS Logic ICs | ROHM 羅姆 | ROHM | | |
NAND GATES | STMICROELECTRONICS 意法半導(dǎo)體 | STMICROELECTRONICS | | |
NAND GATES | STMICROELECTRONICS 意法半導(dǎo)體 | STMICROELECTRONICS | | |
Quadruple 2-input NAND Gate | HitachiHitachi Semiconductor 日立日立公司 | Hitachi | | |
Quadruple 2-input NAND gate | Philips 飛利浦 | Philips | | |
Quadruple 2-input NAND gate | Philips 飛利浦 | Philips | | |
B-Suffix Series CMOS Gates | ONSEMI 安森美半導(dǎo)體 | ONSEMI | | |
B-Suffix Series CMOS Gates | ONSEMI 安森美半導(dǎo)體 | ONSEMI | | |
B-Suffix Series CMOS Gates | Motorola 摩托羅拉 | Motorola | | |
B−Suffix Series CMOS Gates | ONSEMI 安森美半導(dǎo)體 | ONSEMI | | |
B-SUFFIX SERIES CMOS GATES | ONSEMI 安森美半導(dǎo)體 | ONSEMI | | |
B-Suffix Series CMOS Gates | Motorola 摩托羅拉 | Motorola | | |
B-Suffix Series CMOS Gates | Motorola 摩托羅拉 | Motorola | | |
B-SUFFIX SERIES CMOS GATES | ONSEMI 安森美半導(dǎo)體 | ONSEMI | | |
COMPLEMENTARY METAL OXIDE SILICON | NTE | NTE | | |
INPUT NAND GATE | RANDER & E International, Inc. | RANDE | | |
Quad 2 Input NAND Gate | TOSHIBA 東芝 | TOSHIBA | | |
QUAD 2 INPUT NAND GATE | TOSHIBA 東芝 | TOSHIBA | | |
C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC | TOSHIBA 東芝 | TOSHIBA | |
CD4011產(chǎn)品屬性
- 類型
描述
- 型號
CD4011
- 制造商
NSC
- 制造商全稱
National Semiconductor
- 功能描述
Quad 2-Input NOR(NAND) Buffered B Series Gate
| IC供應(yīng)商 | 芯片型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
|---|---|---|---|---|---|---|---|
TI |
25+ |
9500 |
百分百原裝正品 真實(shí)公司現(xiàn)貨庫存 本公司只做原裝 可 |
||||
TI(德州儀器) |
24+ |
標(biāo)準(zhǔn)封裝 |
7438 |
原廠直銷,大量現(xiàn)貨庫存,交期快。價格優(yōu),支持賬期 |
|||
TI/德州儀器 |
25+ |
SOP |
32000 |
TI/德州儀器全新特價CD4011BM96即刻詢購立享優(yōu)惠#長期有貨 |
|||
德州儀器/TI |
24+ |
2000 |
全新原裝深圳倉庫現(xiàn)貨有單必成 |
||||
TI/德州儀器 |
24+ |
DIP |
20000 |
十年沉淀唯有原裝 |
|||
XBLW芯伯樂 |
24+ |
SOP-14 |
50000 |
品牌代理,價格優(yōu)勢,技術(shù)支持!!可直接對標(biāo)進(jìn)口品牌! |
|||
TI |
24+ |
DIP-14 |
5000 |
原裝現(xiàn)貨,可開13%稅票 |
|||
TI/德州儀器 |
22+ |
TSSOP-14 |
500000 |
原裝現(xiàn)貨支持實(shí)單價優(yōu)/含稅 |
|||
TI |
23+ |
DIP-14 |
56000 |
||||
TI |
24+ |
PDIP|14 |
279100 |
免費(fèi)送樣原盒原包現(xiàn)貨一手渠道聯(lián)系 |
CD4011芯片相關(guān)品牌
CD4011規(guī)格書下載地址
CD4011參數(shù)引腳圖相關(guān)
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CD4011數(shù)據(jù)表相關(guān)新聞
CD4011BE原裝現(xiàn)貨熱賣
CD4011BE邏輯門 Quad 2-Input
2021-2-3CD40100BE全新原裝現(xiàn)貨
CD40100BE，全新原裝現(xiàn)貨0755-82732291當(dāng)天發(fā)貨或門市自取.
2021-1-21CD4011BF
單功能門74LVC SMD / SMT 1門2輸入1輸出-32 mA和32 mA-40 C 4.5 ns 5.5 V 1.65 V邏輯門，2輸出AND 5.5 V邏輯門，AND，MUX，NAND，NOR，OR，反相器，非反相器邏輯門，2個門2個輸入邏輯門，1個輸出與邏輯門，PDIP-14 TTL 4個門NAND邏輯門
2020-7-17CD3500GS全新原裝現(xiàn)貨
可立即發(fā)貨
2019-9-20CD4011
CD4011，全新原裝當(dāng)天發(fā)貨或門市自取0755-82732291.
2019-8-9CD40106BM96順德利科技正品原裝進(jìn)口穩(wěn)定的貨源優(yōu)勢的價格
深圳市順德利科技有限公司 0755-82725660 18128853661（微信75056055） QQ：782954141
2019-6-18
DdatasheetPDF頁碼索引
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