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SN74ABT16821DLR.B中文資料

廠(chǎng)家型號(hào) | SN74ABT16821DLR.B |
文件大小 | 603.59Kbytes |
頁(yè)面數(shù)量 | 16頁(yè) |
功能描述 | 20-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS |
數(shù)據(jù)手冊(cè) | |
生產(chǎn)廠(chǎng)商 | TI2 |
SN74ABT16821DLR.B數(shù)據(jù)手冊(cè)規(guī)格書(shū)PDF詳情
Members of the Texas Instruments
WidebusE Family
State-of-the-Art EPIC-IIBE BiCMOS Design
Significantly Reduces Power Dissipation
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Typical VOLP (Output Ground Bounce) < 1 V
at VCC = 5 V, TA = 25°C
Distributed VCC and GND Pin Configuration
Minimizes High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB
Layout
High-Drive Outputs (–32-mA IOH,
64-mA IOL)
Package Options Include Plastic Thin
Shrink Small-Outline (DGG), 300-mil Shrink
Small-Outline (DL) Packages and 380-mil
Fine-Pitch Ceramic Flat (WD) Package
Using 25-mil Center-to-Center Spacings
description
These 20-bit flip-flops feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. They are
particularly suitable for implementing wider buffer
registers, I/O ports, bidirectional bus drivers with
parity, and working registers.
The ’ABT16821 can be used as two 10-bit
flip-flops or one 20-bit flip-flop. The 20 flip-flops
are edge-triggered D-type flip-flops. On the
positive transition of the clock (CLK) input, the
device provides true data at the Q outputs.
A buffered output-enable (OE) input can be used to place the ten outputs in either a normal logic state (high
or low logic level) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines
without need for interface or pullup components.
OE does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABT16821 is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74ABT16821 is characterized for operation from –40°C to 85°C.
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
Texas Instruments |
24+ |
56-BSSOP(0.295 |
56300 |
||||
TI |
20+ |
IC |
1000 |
就找我吧!--邀您體驗(yàn)愉快問(wèn)購(gòu)元件! |
|||
TI |
22+ |
56BSSOP |
9000 |
原廠(chǎng)渠道,現(xiàn)貨配單 |
|||
TI |
25+ |
SSOP56 |
4500 |
全新原裝、誠(chéng)信經(jīng)營(yíng)、公司現(xiàn)貨銷(xiāo)售! |
|||
Texas Instruments |
25+ |
56-SSOP |
9350 |
獨(dú)立分銷(xiāo)商 公司只做原裝 誠(chéng)心經(jīng)營(yíng) 免費(fèi)試樣正品保證 |
|||
TI |
2025+ |
SSOP-56 |
16000 |
原裝優(yōu)勢(shì)絕對(duì)有貨 |
|||
TI |
24+ |
SSOP56 |
139 |
只做原裝,歡迎詢(xún)價(jià),量大價(jià)優(yōu) |
|||
TI |
24+/25+ |
15 |
原裝正品現(xiàn)貨庫(kù)存價(jià)優(yōu) |
||||
24+ |
3000 |
自己現(xiàn)貨 |
|||||
TMS |
06+ |
SOIC |
1000 |
自己公司全新庫(kù)存絕對(duì)有貨 |
SN74ABT16821DLR.B 資料下載更多...
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