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位置:SN74ABT16821DL.B > SN74ABT16821DL.B詳情

SN74ABT16821DL.B中文資料

廠家型號

SN74ABT16821DL.B

文件大小

603.59Kbytes

頁面數(shù)量

16

功能描述

20-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

生產(chǎn)廠商

TI2

SN74ABT16821DL.B數(shù)據(jù)手冊規(guī)格書PDF詳情

Members of the Texas Instruments

WidebusE Family

State-of-the-Art EPIC-IIBE BiCMOS Design

Significantly Reduces Power Dissipation

ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

Typical VOLP (Output Ground Bounce) < 1 V

at VCC = 5 V, TA = 25°C

Distributed VCC and GND Pin Configuration

Minimizes High-Speed Switching Noise

Flow-Through Architecture Optimizes PCB

Layout

High-Drive Outputs (–32-mA IOH,

64-mA IOL)

Package Options Include Plastic Thin

Shrink Small-Outline (DGG), 300-mil Shrink

Small-Outline (DL) Packages and 380-mil

Fine-Pitch Ceramic Flat (WD) Package

Using 25-mil Center-to-Center Spacings

description

These 20-bit flip-flops feature 3-state outputs

designed specifically for driving highly capacitive

or relatively low-impedance loads. They are

particularly suitable for implementing wider buffer

registers, I/O ports, bidirectional bus drivers with

parity, and working registers.

The ’ABT16821 can be used as two 10-bit

flip-flops or one 20-bit flip-flop. The 20 flip-flops

are edge-triggered D-type flip-flops. On the

positive transition of the clock (CLK) input, the

device provides true data at the Q outputs.

A buffered output-enable (OE) input can be used to place the ten outputs in either a normal logic state (high

or low logic level) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive

the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines

without need for interface or pullup components.

OE does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered

while the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABT16821 is characterized for operation over the full military temperature range of –55°C to 125°C.

The SN74ABT16821 is characterized for operation from –40°C to 85°C.

更新時間:2025-9-20 14:30:00
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