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Members of the Texas Instruments

SCOPE ? Family of Testability Products

Members of the Texas Instruments

Widebus? Family

Compatible With the IEEE Standard

1149.1-1990 (JTAG) Test Access Port and

Boundary-Scan Architecture

Include D-Type Flip-Flops and Control

Circuitry to Provide Multiplexed

Transmission of Stored and Real-Time Data

Bus Hold on Data Inputs Eliminates the

Need for External Pullup Resistors

B-Port Outputs of ’ABTH182652A Devices

Have Equivalent 25-Ω Series Resistors, So

No External Resistors Are Required

State-of-the-Art EPIC-ΙΙB ? BiCMOS Design

One Boundary-Scan Cell Per I/O

Architecture Improves Scan Efficiency

SCOPE ? Instruction Set

? IEEE Standard 1149.1-1990 Required

Instructions and Optional CLAMP and

HIGHZ

? Parallel-Signature Analysis at Inputs

? Pseudo-Random Pattern Generation

From Outputs

? Sample Inputs/Toggle Outputs

? Binary Count From Outputs

? Device Identification

? Even-Parity Opcodes

Packaged in 64-Pin Plastic Thin Quad Flat

(PM) Packages Using 0.5-mm

Center-to-Center Spacings and 68-Pin

Ceramic Quad Flat (HV) Packages Using

25-mil Center-to-Center Spacings