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DESCRIPTION

The 74ABT16841A Bus interface latch is designed to provide extra data width for wider data/address paths of buses carrying parity.

FEATURES

? High speed parallel latches

? Live insertion/extraction permitted

? Extra data width for wide address/data paths or buses carrying parity

? Power-up 3-State

? 74ABTH16841A incorporates bus-hold data inputs which eliminate the need for external pull-up resistors to hold unused inputs

? Power-up reset

? Ideal where high speed, light loading, or increased fan-in are required with MOS microprocessors

? Output capability: +64mA/–32mA

? Latch-up protection exceeds 500mA per Jedec Std 17

? ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model