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SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1? Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch ? Supports 5-V VCC Operation ? Inputs Accept Voltages to 5.5 V ? Provides Down Translation to VCC ? Max t pd of 3.7 ns at 3.3 V ? Low Power Consumption, 10-μA Max ICC ? ±24-mA Output Drive at 3.3 V ? Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

文件：1.7749 Mbytes Page：37 Pages

Single Bus Buffer Gate With 3-State Output

文件：2.77278 Mbytes Page：43 Pages

封裝/外殼：4-XFDFN 裸露焊盤 包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 描述：IC BUF NON-INVERT 5.5V 4X2SON 集成電路（IC） 緩沖器，驅動器，接收器，收發(fā)器

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1? Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch ? Supports 5-V VCC Operation ? Inputs Accept Voltages to 5.5 V ? Provides Down Translation to VCC ? Max t pd of 3.7 ns at 3.3 V ? Low Power Consumption, 10-μA Max ICC ? ±24-mA Output Drive at 3.3 V ? Ioff S

Bus buffer/line driver; 3-state

Bus buffer/line driver; 3-state

DESCRIPTION The 74LVC1G125 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. FEAT

SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUTS

文件：119.99 Kbytes Page：8 Pages

Bus buffer/line driver; 3-state

SINGLE BUFFER GATE WITH 3-STATE OUTPUT

文件：268.78 Kbytes Page：14 Pages