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位置:SC68C562A8A > SC68C562A8A詳情

SC68C562A8A中文資料

廠家型號

SC68C562A8A

文件大小

163.94Kbytes

頁面數(shù)量

26

功能描述

CMOS dual universal serial communications controller CDUSCC

數(shù)據(jù)手冊

下載地址一下載地址二

簡稱

PHILIPS飛利浦

生產(chǎn)廠商

Philips Semiconductors

中文名稱

荷蘭皇家飛利浦官網(wǎng)

SC68C562A8A數(shù)據(jù)手冊規(guī)格書PDF詳情

DESCRIPTION

The Philips Semiconductors SC68C562 Dual Universal Serial Communications Controller (CDUSCC) is a single-chip CMOS-LSI communications device that provides two independent, multi-protocol, full-duplex receiver/transmitter channels in a single package. It supports bit-oriented and character-oriented (byte count and byte control) synchronous data link controls as well as asynchronous protocols. The SC68C562 interfaces to the 68000 MPUs via asynchronous bus control signals and is capable of program-polled, interrupt driven, block-move or DMA data transfers.

FEATURES

? Full hardware and software upward compatibility with previous NMOS device

General Features

? Dual full-duplex synchronous/ asynchronous receiver and transmitter

? Low power CMOS process

? Multiprotocol operation

– BOP: HDLC/ADCCP, SDLC, SDLC loop, X.25 or X.75 link level, etc.

– COP: BISYNC, DDCMP

– ASYNC: 5–8 bits plus optional parity

? Sixteen character receiver and transmitter FIFOs

? 0 to 10MHz data rate

? Programmable bit rate for each receiver and transmitter selectable from:

– 19 fixed rates: 50 to 64k baud

– One user-defined rate derived from programmable counter/timer

– External 1X or 16X clock

– Digital phase-locked loop

? Parity and FCS (frame check sequence LRC or CRC) generation and checking

? Programmable data encoding/decoding: NRZ, NRZI, FM0, FM1, Manchester

? Programmable channel mode: full- and half-duplex, auto-echo, or local loopback

? Programmable data transfer mode: polled, interrupt, DMA, wait

? DMA interface

– Compatible with the Philips Semiconductors SCB68430 Direct Memory Access Interface (DMAI) and other DMA controllers

– Single- or dual-address dual transfers

– Half- or full-duplex operation

– Automatic frame termination on counter/timer terminal count or DMA DONE

? Transmit path clear status

? Interrupt capabilities

– Daisy chain option

– Vector output (fixed or modified by status)

– Programmable internal priorities

– Interrupt at any FIFO fill level

– Maskable interrupt conditions

? FIFO’d status bits

? Watchdog timer

? Multi-function programmable 16-bit counter/timer

– Bit rate generator

– Event counter

– Count received or transmitted characters

– Delay generator

– Automatic bit length measurement

? Modem controls

– RTS, CTS, DCD, and up to four general I/O pins per channel

– CTS and DCD programmable auto-enables for Tx and Rx

– Programmable interrupt on change of CTS or DCD

? On-chip oscillator for crystal

? TTL compatible

? Single +5V power supply

更新時間:2025-7-22 11:13:00
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