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型號(hào) 功能描述 生產(chǎn)廠家&企業(yè) LOGO 操作
PDM41024LA12TSOITR

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分類制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分類制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分類制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分類制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分類制造商

1 Megabit Static RAM 128K x 8-Bit

[Paradigm-Technology] Description The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is accomplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is accomplished when WE and CE2 remain HIGH and CE1 and OE

ETCList of Unclassifed Manufacturers

未分類制造商

PDM41024LA12TSOITR產(chǎn)品屬性

  • 類型

    描述

  • 型號(hào)

    PDM41024LA12TSOITR

  • 功能描述

    1 Megabit Static RAM 128K x 8-Bit

更新時(shí)間：2025-9-3 14:22:00
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9434
LCC32
14
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