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Level shifting hot swappable I2C-bus and SMBus bus buffer

General description The PCA9512A is a hot swappable I2C-bus and SMBus buffer that allows I/O card insertion into a live backplane without corruption of the data and clock buses and includes two dedicated supply voltage pins to provide level shifting between 3.3 V and 5 V systems while maintaining

Level shifting hot swappable I2C-bus and SMBus bus buffer

Level shifting hot swappable I2C-bus and SMBus bus buffer

Level shifting hot swappable I2C-bus and SMBus bus buffer

文件：135.97 Kbytes Page：22 Pages

Level shifting hot swappable I2C-bus and SMBus bus buffer

Level shifting hot swappable I2C-bus and SMBus bus buffer

Level shifting hot swappable I2C-bus and SMBus bus buffer

General description The PCA9512A is a hot swappable I2C-bus and SMBus buffer that allows I/O card insertion into a live backplane without corruption of the data and clock buses and includes two dedicated supply voltage pins to provide level shifting between 3.3 V and 5 V systems while maintaining

封裝/外殼：8-SOIC（0.154"，3.90mm 寬） 包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 描述：IC BUFFER I2C/SMBUS HOTSWAP 8SO 集成電路（IC） 信號(hào)緩沖器、中繼器、分離器

Level shifting hot swappable I2C-bus and SMBus bus buffer

Level shifting hot swappable I2C-bus and SMBus bus buffer

文件：135.97 Kbytes Page：22 Pages

Level shifting hot swappable I2C-bus and SMBus bus buffer

封裝/外殼：8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 描述：IC ACCELERATR I2C HOTSWAP 8TSSOP 集成電路（IC） 信號(hào)緩沖器、中繼器、分離器

High Perform Instr, 2 Pr #22 Str TC, PVC Ins E2, OS, PVC Jkt, PLTC

Product Description High Performance Instrumentation, 2 Pair 22AWG (7x30) Tinned Copper, PVC Insulation E2 Color Code, Overall Beldfoil? Shield, PVC Outer Jacket, PLTC

800 MHz Clock Distribution IC,1.5 GHz Inputs, Dividers, Delay Adjust, Five Outputs

GENERAL DESCRIPTION The AD9512 provides a multi-output clock distribution in a design that emphasizes low jitter and low phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements can also benefit from this part. There are five indep

1.2 GHz Clock Distribution IC, 1.6 GHz Inputs, Dividers, Delay Adjust, Five Outputs

GENERAL DESCRIPTION The AD9512 provides a multi-output clock distribution in a design that emphasizes low jitter and low phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements can also benefit from this part. There are five indep

MACHINE SCREW PAN PHILLIPS 10-32

文件：130.87 Kbytes Page：1 Pages

28V N-Channel Power MOSFET

文件：145.64 Kbytes Page：6 Pages