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LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT

Features ? Input frequency up to 200 MHz ? Advanced CMOS process ? Outputs are skew matched to within 50 ps ? Packaged in 16-pin TSSOP, Pb-free ? One PECL input to 4 PECL output clock drivers ? Operating Voltages of 3.3 V or 5 V ? Industrial temperature range ? Functional equivalent to ICS

LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT

文件：128.919 Kbytes Page：6 Pages

LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT

LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT

Description The ICS554-01 is a low skew clock buffer with a single complimentary PECL input to four PECL outputs. Part of ICS’ Clock BlocksTM family, this is our lowest skew PECL clock buffer. For parts which do not require PECL inputs or outputs, see the ICS553 for a 1 to 4 low skew buffer, or t

Clock Divider

文件：148.13 Kbytes Page：7 Pages

Clock Divider

文件：148.13 Kbytes Page：7 Pages