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MCU

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Clock, reset and supply management

The STM32F103xx medium-density performance line family incorporates the high performance ARM Cortex?-M3 32-bit RISC core operating at a 72 MHz frequency, high speed embedded memories (Flash memory up to 128 Kbytes and SRAM up to 20 Kbytes), and an extensive range of enhanced I/Os and peripherals

High-density performance line Arm?-based 32-bit MCU with 256 to 512KB Flash, USB, CAN, 11 timers, 3 ADCs, 13 communication interfaces

Features ? Core: Arm 32-bit Cortex -M3 CPU – 72 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state memory access – Single-cycle multiplication and hardware division ? Memories – 256 to 512 Kbytes of Flash memory – up to 64 Kbytes of SRAM – Flexible static m

High-density performance line Arm?-based 32-bit MCU with 256 to 512KB Flash, USB, CAN, 11 timers, 3 ADCs, 13 communication interfaces

Features ? Core: Arm 32-bit Cortex -M3 CPU – 72 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state memory access – Single-cycle multiplication and hardware division ? Memories – 256 to 512 Kbytes of Flash memory – up to 64 Kbytes of SRAM – Flexible static m

This datasheet provides the ordering informationmechanical device acteristics of the STM32F103xC, STM32F103xDSTM32F103xE high-density performance line microcontrollers. For more details on the whole STMicroelectronics STM32F103xC/D/E

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