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3-STATE Dual 1-of-4 Line Data Selector/Multiplexer

General Description This Data Selector/Multiplexer contains full on-chip decoding to select one-of-four data sources as a result of a unique two-bit binary code at the Select Inputs. Each of the two Data Selector/Multiplexer circuits have their own separate Data and Output Control inputs and a no

封裝/外殼：16-SOIC（0.154"，3.90mm 寬） 包裝：卷帶（TR） 描述：IC MULTIPLEXER 2 X 4:1 16SOIC 集成電路（IC） 信號開關(guān)，多路復(fù)用器，解碼器

3-STATE Dual 1-of-4 Line Data Selector/Multiplexer

General Description This Data Selector/Multiplexer contains full on-chip decoding to select one-of-four data sources as a result of a unique two-bit binary code at the Select Inputs. Each of the two Data Selector/Multiplexer circuits have their own separate Data and Output Control inputs and a no

封裝/外殼：16-SOIC（0.154"，3.90mm 寬） 包裝：管件 描述：IC MULTIPLEXER 2 X 4:1 16SOIC 集成電路（IC） 信號開關(guān)，多路復(fù)用器，解碼器

Dual 4-input multiplexer 3-State

DESCRIPTION The 74ALS253 has two identical 4-input multiplexers with 3-State outputs which select 2 bits from four sources by using common select input (S0, S1). When the individual output enable (OEa, OEb) inputs of the 4-input multiplexers are High, the outputs are forced to a High impedance (Z

Dual 4-input multiplexer 3-State

DESCRIPTION The 74ALS253 has two identical 4-input multiplexers with 3-State outputs which select 2 bits from four sources by using common select input (S0, S1). When the individual output enable (OEa, OEb) inputs of the 4-input multiplexers are High, the outputs are forced to a High impedance (Z

Dual 4-input multiplexer 3-State

DESCRIPTION The 74ALS253 has two identical 4-input multiplexers with 3-State outputs which select 2 bits from four sources by using common select input (S0, S1). When the individual output enable (OEa, OEb) inputs of the 4-input multiplexers are High, the outputs are forced to a High impedance (Z

Dual 4-input multiplexer 3-State

DESCRIPTION The 74ALS253 has two identical 4-input multiplexers with 3-State outputs which select 2 bits from four sources by using common select input (S0, S1). When the individual output enable (OEa, OEb) inputs of the 4-input multiplexers are High, the outputs are forced to a High impedance (Z