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ADN2812ACP價(jià)格
參考價(jià)格:¥459.7687
型號(hào):ADN2812ACPZ 品牌:Analog 備注:這里有ADN2812ACP多少錢(qián),2025年最近7天走勢(shì),今日出價(jià),今日競(jìng)價(jià),ADN2812ACP批發(fā)/采購(gòu)報(bào)價(jià),ADN2812ACP行情走勢(shì)銷售排行榜,ADN2812ACP報(bào)價(jià)。型號(hào) | 功能描述 | 生產(chǎn)廠家&企業(yè) | LOGO | 操作 |
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ADN2812ACP | Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp GENERAL DESCRIPTION The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming | AD 亞德諾 | ||
Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp GENERAL DESCRIPTION The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming | AD 亞德諾 | |||
Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp FEATURES Serial data input: 12.3 Mb/s to 2.7 Gb/s Exceeds SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 6 mV typical Adjustable slice level: ±100 mV Patented clock recovery architecture Loss of signal (LOS) detect range: 3 mV to 15 mV Independent slice | AD 亞德諾 | |||
Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp GENERAL DESCRIPTION The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming | AD 亞德諾 | |||
Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp GENERAL DESCRIPTION The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming | AD 亞德諾 | |||
Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery GENERAL DESCRIPTION The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming | AD 亞德諾 | |||
Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp FEATURES Serial data input: 12.3 Mb/s to 2.7 Gb/s Exceeds SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 6 mV typical Adjustable slice level: ±100 mV Patented clock recovery architecture Loss of signal (LOS) detect range: 3 mV to 15 mV Independent slice | AD 亞德諾 | |||
Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp FEATURES Serial data input: 12.3 Mb/s to 2.7 Gb/s Exceeds SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 6 mV typical Adjustable slice level: ±100 mV Patented clock recovery architecture Loss of signal (LOS) detect range: 3 mV to 15 mV Independent slice | AD 亞德諾 | |||
Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery GENERAL DESCRIPTION The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming | AD 亞德諾 | |||
Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery GENERAL DESCRIPTION The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming | AD 亞德諾 | |||
Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp FEATURES Serial data input: 12.3 Mb/s to 2.7 Gb/s Exceeds SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 6 mV typical Adjustable slice level: ±100 mV Patented clock recovery architecture Loss of signal (LOS) detect range: 3 mV to 15 mV Independent slice | AD 亞德諾 | |||
封裝/外殼:32-WFQFN 裸露焊盤(pán),CSP 包裝:散裝 描述:IC CLOCK/DATA RECOVERY 32LFCSP 集成電路(IC) 應(yīng)用特定時(shí)鐘/定時(shí) | AD 亞德諾 | |||
封裝/外殼:32-WFQFN 裸露焊盤(pán),CSP 包裝:托盤(pán) 描述:IC CLOCK/DATA RECOVERY 32LFCSP 集成電路(IC) 應(yīng)用特定時(shí)鐘/定時(shí) | AD 亞德諾 | |||
4/6 Wire Ststems Dectectors 2800 Series 4/6 Wire Ststems Dectectors | SYSTEMSENSOR Systemsensor advanced ideas. | |||
174 MHz lowpass filter 文件:48.8 Kbytes Page:2 Pages | KR KR Electronics, Inc. |
ADN2812ACP產(chǎn)品屬性
- 類型
描述
- 型號(hào)
ADN2812ACP
- 制造商
Analog Devices
- 功能描述
IC CLOCK/DATA RECOVERY
IC供應(yīng)商 | 芯片型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
ADI(亞德諾) |
23+ |
N/A |
10000 |
公司只做原裝,可來(lái)電咨詢 |
|||
ADI/LINEAR |
24+ |
AA |
58209 |
免費(fèi)送樣原盒原包現(xiàn)貨一手渠道聯(lián)系 |
|||
ADI/亞德諾 |
23+ |
AFN |
30000 |
全新原裝,假一賠十,價(jià)格優(yōu)勢(shì) |
|||
ADI/亞德諾 |
25+ |
20000 |
原裝現(xiàn)貨,可追溯原廠渠道 |
||||
AD |
2016+ |
QFN |
3000 |
只做原裝,假一罰十,公司可開(kāi)17%增值稅發(fā)票! |
|||
Analog Devices |
23+ |
35500 |
|||||
ADI(亞德諾) |
24+ |
LFCSP-32-WQ(5x5) |
7457 |
原廠可訂貨,技術(shù)支持,直接渠道。可簽保供合同 |
|||
ADI(亞德諾) |
24+ |
LFCSP32WQ(5x5) |
907 |
只做原裝,提供一站式配單服務(wù),代工代料。BOM配單 |
|||
ADI |
24+ |
LFCSP |
35210 |
原裝現(xiàn)貨/放心購(gòu)買(mǎi) |
|||
ADI/亞德諾 |
16+ |
32LFCSP |
3000 |
全新進(jìn)口原裝 |
ADN2812ACP芯片相關(guān)品牌
ADN2812ACP規(guī)格書(shū)下載地址
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2012-12-12
DdatasheetPDF頁(yè)碼索引
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