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型號(hào) 功能描述 生產(chǎn)廠家&企業(yè) LOGO 操作
A67P9318E

512K X 18, 256K X 36 LVTTL, Pipelined ZeBL SRAM

General Description The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. The A67P9318, A67P8336 SRAMs integrate a 512K X 18, 256K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. Thes

AMICC

歐密格光電

512K X 18, 256K X 36 LVTTL, Pipelined ZeBL SRAM

General Description The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. The A67P9318, A67P8336 SRAMs integrate a 512K X 18, 256K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. Thes

AMICC

歐密格光電

512K X 18, 256K X 36 LVTTL, Pipelined ZeBL SRAM

General Description The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. The A67P9318, A67P8336 SRAMs integrate a 512K X 18, 256K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. Thes

AMICC

歐密格光電

512K X 18, 256K X 36 LVTTL, Pipelined ZeBL SRAM

General Description The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. The A67P9318, A67P8336 SRAMs integrate a 512K X 18, 256K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. Thes

AMICC

歐密格光電

512K X 18, 256K X 36 LVTTL, Pipelined ZeBL SRAM

General Description The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. The A67P9318, A67P8336 SRAMs integrate a 512K X 18, 256K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. Thes

AMICC

歐密格光電

512K X 18, 256K X 36 LVTTL, Pipelined ZeBL SRAM

General Description The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. The A67P9318, A67P8336 SRAMs integrate a 512K X 18, 256K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. Thes

AMICC

歐密格光電

512K X 18, 256K X 36 LVTTL, Pipelined ZeBL SRAM

General Description The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. The A67P9318, A67P8336 SRAMs integrate a 512K X 18, 256K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. Thes

AMICC

歐密格光電

512K X 18, 256K X 36 LVTTL, Pipelined ZeBL SRAM

General Description The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. The A67P9318, A67P8336 SRAMs integrate a 512K X 18, 256K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. Thes

AMICC

歐密格光電

512K X 18, 256K X 36 LVTTL, Pipelined ZeBL SRAM

General Description The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. The A67P9318, A67P8336 SRAMs integrate a 512K X 18, 256K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. Thes

AMICC

歐密格光電

512K X 18, 256K X 36 LVTTL, Pipelined ZeBL SRAM

General Description The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. The A67P9318, A67P8336 SRAMs integrate a 512K X 18, 256K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. Thes

AMICC

歐密格光電

512K X 18, 256K X 36 LVTTL, Pipelined ZeBL SRAM

General Description The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. The A67P9318, A67P8336 SRAMs integrate a 512K X 18, 256K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. Thes

AMICC

歐密格光電

512K X 18, 256K X 36 LVTTL, Pipelined ZeBL SRAM

General Description The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. The A67P9318, A67P8336 SRAMs integrate a 512K X 18, 256K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. Thes

AMICC

歐密格光電

512K X 18, 256K X 36 LVTTL, Pipelined ZeBL SRAM

General Description The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. The A67P9318, A67P8336 SRAMs integrate a 512K X 18, 256K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. Thes

AMICC

歐密格光電

512K X 18, 256K X 36 LVTTL, Pipelined ZeBL SRAM

General Description The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. The A67P9318, A67P8336 SRAMs integrate a 512K X 18, 256K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. Thes

AMICC

歐密格光電

A67P9318E產(chǎn)品屬性

  • 類型

    描述

  • 型號(hào)

    A67P9318E

  • 制造商

    AMICC

  • 制造商全稱

    AMIC Technology

  • 功能描述

    512K X 18, 256K X 36 LVTTL, Pipelined ZeBL SRAM

更新時(shí)間：2025-8-31 10:30:00
IC供應(yīng)商 芯片型號(hào) 品牌 批號(hào) 封裝 庫存 備注 價(jià)格
Allegro MicroSystems LLC
22+
14DIP
9000
原廠渠道,現(xiàn)貨配單
ALLEGRO
22+
原廠原封
8200
原裝現(xiàn)貨庫存.價(jià)格優(yōu)勢!!
ALLEGRO
1633+
DIP14
3554
代理品牌
Allegro MicroSystems, LLC
24+
14-DIP
36500
一級(jí)代理/放心采購
ALLEGRO/雅麗高
23+
DIP
50000
全新原裝正品現(xiàn)貨,支持訂貨
ALLEGRO/美國埃戈羅
25+
DIP
54648
百分百原裝現(xiàn)貨 實(shí)單必成 歡迎詢價(jià)
ALLEGRO
2023+
DIP14
58000
進(jìn)口原裝,現(xiàn)貨熱賣
TI
23+
120
現(xiàn)貨庫存
ALLEGRO/雅麗高
21+
DIP
120000
長期代理優(yōu)勢供應(yīng)
ALLEGRO/雅麗高
24+
DIP
990000
明嘉萊只做原裝正品現(xiàn)貨

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A67P9318E規(guī)格書下載地址

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