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74HCT11價格
參考價格：￥1.2170
型號：74HCT112D,652 品牌：NXP 備注：這里有74HCT11多少錢，2025年最近7天走勢，今日出價，今日競價，74HCT11批發(fā)/采購報價，74HCT11行情走勢銷售排行榜，74HCT11報價。| 型號 | 功能描述 | 生產(chǎn)廠家 企業(yè) | LOGO | 操作 |
|---|---|---|---|---|
74HCT11 | Triple 3-input AND gate GENERAL DESCRIPTION The 74HC/HCT11 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT11 provide the 3-input AND function. FEATURES ? Output capability: standard ? ICC categor | Philips 飛利浦 |   | |
74HCT11 | Triple 3-input AND gate | ETC 知名廠家 | ETC | |
74HCT11 | Triple 3-input AND gate 1. General description The 74HC11; 74HCT11 is a triple 3-input AND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits ? Wide supply voltage range from 2.0 to 6.0 V ? CMOS low power di | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國)有限公司 | | |
Dual JK flip-flop with set and reset; negative-edge trigger 1. General description The 74HC112; 74HCT112 is a dual negative-edge triggered JK flip-flop. It features individual J and K inputs, clock (nCP) set (nSD) and reset (nRD) inputs. It also has complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and operate indepen | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國)有限公司 | | ||
Dual JK flip-flop with set and reset; negative-edge trigger GENERAL DESCRIPTION The 74HC/HCT112 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES ? Asynchronous set and reset ? Output capability: standard ? ICC category: flip | Philips 飛利浦 | | ||
Dual JK flip-flop with set and reset; negative-edge trigger GENERAL DESCRIPTION The 74HC/HCT112 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES ? Asynchronous set and reset ? Output capability: standard ? ICC category: flip | Philips 飛利浦 | | ||
Dual JK flip-flop with set and reset; negative-edge trigger 1. General description The 74HC112; 74HCT112 is a dual negative-edge triggered JK flip-flop. It features individual J and K inputs, clock (nCP) set (nSD) and reset (nRD) inputs. It also has complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and operate indepen | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國)有限公司 | | ||
Dual JK flip-flop with set and reset; negative-edge trigger GENERAL DESCRIPTION The 74HC/HCT112 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES ? Asynchronous set and reset ? Output capability: standard ? ICC category: flip | Philips 飛利浦 | | ||
Dual JK flip-flop with set and reset; negative-edge trigger GENERAL DESCRIPTION The 74HC/HCT112 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES ? Asynchronous set and reset ? Output capability: standard ? ICC category: flip | Philips 飛利浦 | | ||
Dual JK flip-flop with set and reset; negative-edge trigger GENERAL DESCRIPTION The 74HC/HCT112 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES ? Asynchronous set and reset ? Output capability: standard ? ICC category: flip | Philips 飛利浦 | | ||
Dual JK flip-flop with set and reset; negative-edge trigger 1. General description The 74HC112; 74HCT112 is a dual negative-edge triggered JK flip-flop. It features individual J and K inputs, clock (nCP) set (nSD) and reset (nRD) inputs. It also has complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and operate indepen | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國)有限公司 | | ||
Triple 3-input AND gate General description The 74HC11; 74HCT11 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC11; 74HCT11 provides a triple 3-input AND function. | SYC | | ||
Triple 3-input AND gate 1. General description The 74HC11; 74HCT11 is a triple 3-input AND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits ? Wide supply voltage range from 2.0 to 6.0 V ? CMOS low power di | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國)有限公司 | | ||
Triple 3-input AND gate | ETC 知名廠家 | ETC | | |
Triple 3-input AND gate GENERAL DESCRIPTION The 74HC/HCT11 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT11 provide the 3-input AND function. FEATURES ? Output capability: standard ? ICC categor | Philips 飛利浦 | | ||
Triple 3-input AND gate GENERAL DESCRIPTION The 74HC/HCT11 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT11 provide the 3-input AND function. FEATURES ? Output capability: standard ? ICC categor | Philips 飛利浦 | | ||
Triple 3-input AND gate | ETC 知名廠家 | ETC | | |
Triple 3-input AND gate General description The 74HC11; 74HCT11 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC11; 74HCT11 provides a triple 3-input AND function. | SYC | | ||
Triple 3-input AND gate 1. General description The 74HC11-Q100; 74HCT11-Q100 is a triple 3-input AND gate. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. This product has been qualified to the Automotive Electronics Council (AEC) standard | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國)有限公司 | | ||
Triple 3-input AND gate | ETC 知名廠家 | ETC | | |
Triple 3-input AND gate GENERAL DESCRIPTION The 74HC/HCT11 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT11 provide the 3-input AND function. FEATURES ? Output capability: standard ? ICC categor | Philips 飛利浦 | | ||
Triple 3-input AND gate General description The 74HC11; 74HCT11 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC11; 74HCT11 provides a triple 3-input AND function. | SYC | | ||
Triple 3-input AND gate General description The 74HC11; 74HCT11 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC11; 74HCT11 provides a triple 3-input AND function. | SYC | | ||
Triple 3-input AND gate 1. General description The 74HC11; 74HCT11 is a triple 3-input AND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits ? Wide supply voltage range from 2.0 to 6.0 V ? CMOS low power di | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國)有限公司 | | ||
Triple 3-input AND gate | ETC 知名廠家 | ETC | | |
Triple 3-input AND gate 1. General description The 74HC11-Q100; 74HCT11-Q100 is a triple 3-input AND gate. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. This product has been qualified to the Automotive Electronics Council (AEC) standard | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國)有限公司 | | ||
Triple 3-input AND gate 1. General description The 74HC11-Q100; 74HCT11-Q100 is a triple 3-input AND gate. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. This product has been qualified to the Automotive Electronics Council (AEC) standard | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國)有限公司 | | ||
封裝/外殼：16-SOIC（0.154"，3.90mm 寬） 功能：設(shè)置（預(yù)設(shè)）和復(fù)位 包裝：卷帶（TR） 描述：IC FF JK TYPE DUAL 1BIT 16SO 集成電路（IC） 觸發(fā)器 | ETC 知名廠家 | ETC | | |
74HCT112DB - dual JK flip-flop with set and reset; negative-edge trigger | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國)有限公司 | | ||
封裝/外殼：16-SSOP（0.209"，5.30mm 寬） 功能：設(shè)置（預(yù)設(shè)）和復(fù)位 包裝：管件 描述：IC FF JK TYPE DUAL 1BIT 16SSOP 集成電路（IC） 觸發(fā)器 | ETC 知名廠家 | ETC | | |
Dual JK flip-flop with set and reset; negative-edge trigger | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國)有限公司 | | ||
Dual JK flip-flop with set and reset; negative-edge trigger | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國)有限公司 | | ||
Triple 3-input AND gate 文件：693.09 Kbytes Page：13 Pages | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國)有限公司 | | ||
Triple 3-input AND gate 文件：693.09 Kbytes Page：13 Pages | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國)有限公司 | |
74HCT11產(chǎn)品屬性
- 類型
描述
- 型號
74HCT11
- 功能描述
觸發(fā)器 DUAL JK F/F NEG-EDGE
- RoHS
否
- 制造商
Texas Instruments
- 電路數(shù)量
2
- 邏輯系列
SN74
- 邏輯類型
D-Type Flip-Flop
- 極性
Inverting, Non-Inverting
- 輸入類型
CMOS
- 傳播延遲時間
4.4 ns
- 高電平輸出電流
- 16 mA
- 低電平輸出電流
16 mA
- 電源電壓-最大
5.5 V
- 最大工作溫度
+ 85 C
- 安裝風格
SMD/SMT
- 封裝/箱體
X2SON-8
- 封裝
Reel
| IC供應(yīng)商 | 芯片型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
|---|---|---|---|---|---|---|---|
恩XP |
22+ |
14TSSOP |
9000 |
原廠渠道,現(xiàn)貨配單 |
|||
PHI |
25+ |
DIP-16 |
65428 |
百分百原裝現(xiàn)貨 實單必成 |
|||
PHI |
23+ |
SOP |
30000 |
代理全新原裝現(xiàn)貨,價格優(yōu)勢 |
|||
PHI |
新 |
100 |
全新原裝 貨期兩周 |
||||
PHI |
25+23+ |
TSSOP |
28047 |
絕對原裝正品全新進口深圳現(xiàn)貨 |
|||
恩XP |
24+ |
SOP16 |
47186 |
鄭重承諾只做原裝進口現(xiàn)貨 |
|||
PHI |
24+ |
3.9mm14 |
2500 |
全新現(xiàn)貨 |
|||
TI |
25+ |
SOP |
2987 |
只售原裝自家現(xiàn)貨!誠信經(jīng)營!歡迎來電! |
|||
NEXPERIA/安世 |
23+ |
NA |
5000 |
只有原裝,歡迎來電咨詢! |
|||
TI |
23+ |
SOP3.9 |
5000 |
原裝正品,假一罰十 |
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DdatasheetPDF頁碼索引
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