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型號 功能描述 生產(chǎn)廠家 企業(yè) LOGO 操作
74HC107PW

Dual JK flip-flop with reset; negative-edge trigger

GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, cloc

Philips

飛利浦

74HC107PW

Dual JK flip-flop with reset; negative-edge trigger

1. General description The 74HC107; 74HCT107 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) and reset (R) inputs and complementary Q and Q outputs. The reset is an asynchronous active LOW input and operates independently of the clock input. The J

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國)有限公司

74HC107PW

Dual JK flip-flop with reset; negative-edge trigger

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國)有限公司

Dual JK flip-flop with reset; negative-edge trigger

1. General description The 74HC107; 74HCT107 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) and reset (R) inputs and complementary Q and Q outputs. The reset is an asynchronous active LOW input and operates independently of the clock input. The J

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國)有限公司

Dual JK flip-flop with reset; negative-edge trigger

GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, cloc

Philips

飛利浦

Dual JK flip-flop with reset; negative-edge trigger

1. General description The 74HC107-Q100; 74HCT107-Q100 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) and reset (R) inputs and complementary Q and Q outputs. The reset is an asynchronous active LOW input and operates independently of the clock inp

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國)有限公司

封裝/外殼：14-TSSOP（0.173"，4.40mm 寬） 功能：復(fù)位 包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 描述：IC FF JK TYPE DUAL 1BIT 14TSSOP 集成電路（IC） 觸發(fā)器

ETC

知名廠家

Dual JK flip-flop with reset; negative-edge trigger

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國)有限公司

Dual JK flip-flop with reset; negative-edge trigger

文件：747.99 Kbytes Page：17 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國)有限公司

封裝/外殼：14-TSSOP（0.173"，4.40mm 寬） 功能：復(fù)位 包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 描述：IC FF JK TYPE DUAL 1BIT 14TSSOP 集成電路（IC） 觸發(fā)器

ETC

知名廠家

Dual JK flip-flop with reset; negative-edge trigger

1. General description The 74HC107; 74HCT107 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) and reset (R) inputs and complementary Q and Q outputs. The reset is an asynchronous active LOW input and operates independently of the clock input. The J

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國)有限公司

Dual JK flip-flop with reset; negative-edge trigger

GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, cloc

Philips

飛利浦

Dual JK flip-flop with reset; negative-edge trigger

GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, cloc

Philips

飛利浦

74HC107PW產(chǎn)品屬性

  • 類型

    描述

  • 型號

    74HC107PW

  • 功能描述

    觸發(fā)器 DUAL J-K W/NEG-EDGE TRIG

  • RoHS

    否

  • 制造商

    Texas Instruments

  • 電路數(shù)量

    2

  • 邏輯系列

    SN74

  • 邏輯類型

    D-Type Flip-Flop

  • 極性

    Inverting, Non-Inverting

  • 輸入類型

    CMOS

  • 傳播延遲時間

    4.4 ns

  • 高電平輸出電流

    - 16 mA

  • 低電平輸出電流

    16 mA

  • 電源電壓-最大

    5.5 V

  • 最大工作溫度

    + 85 C

  • 安裝風(fēng)格

    SMD/SMT

  • 封裝/箱體

    X2SON-8

  • 封裝

    Reel

更新時間：2025-9-17 20:00:00
IC供應(yīng)商 芯片型號 品牌 批號 封裝 庫存 備注 價格
恩XP
25+
TSSOP14
54648
百分百原裝現(xiàn)貨 實單必成 歡迎詢價
恩XP
24+
TSSOP14
990000
明嘉萊只做原裝正品現(xiàn)貨
恩XP
2016+
TSOP
2600
只做原裝,假一罰十,公司可開17%增值稅發(fā)票!
PHI
23+
5000
原廠授權(quán)代理,海外優(yōu)勢訂貨渠道?？商峁┐罅繋齑?詳
ph
24+
N/A
6980
原裝現(xiàn)貨,可開13%稅票
恩XP
25+
SOP
3200
全新原裝、誠信經(jīng)營、公司現(xiàn)貨銷售
恩XP
25+
14+PB
251
百分百原裝正品 真實公司現(xiàn)貨庫存 本公司只做原裝 可
NEXPERIA/安世
2022+
2500
6600
只做原裝,假一罰十,長期供貨。
Nexperia(安世)
24+
TSSOP14
2669
只做原裝,提供一站式配單服務(wù),代工代料。BOM配單
Nexperia USA Inc.
24+
14-TSSOP(0.173
56300

74HC107PW芯片相關(guān)品牌

74HC107PW規(guī)格書下載地址

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74HC107PW數(shù)據(jù)表相關(guān)新聞

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