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Low-power dual Schmitt trigger

1. General description The 74AUP2G17 is a dual buffer with Schmitt-trigger inputs. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry

Low-power dual Schmitt trigger

1. General description The 74AUP2G17 is a dual buffer with Schmitt-trigger inputs. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry

DUAL SCHMITT TRIGGER BUFFERS

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Low-power dual Schmitt trigger

Low-power dual Schmitt trigger

封裝/外殼：6-XFDFN 包裝：卷帶（TR） 描述：IC BUFFER NON-INVERT 3.6V 6XSON 集成電路（IC） 緩沖器，驅動器，接收器，收發(fā)器

Low-power dual Schmitt trigger