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位置:TPIC6C596DRQ1.A > TPIC6C596DRQ1.A詳情

TPIC6C596DRQ1.A中文資料

廠家型號(hào)

TPIC6C596DRQ1.A

文件大小

757.02Kbytes

頁(yè)面數(shù)量

31頁(yè)

功能描述

TPIC6C596 Power Logic 8-Bit Shift Register

數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

生產(chǎn)廠商

TI2

TPIC6C596DRQ1.A數(shù)據(jù)手冊(cè)規(guī)格書PDF詳情

1 Features

1? Low RDS(on), 7 Ω (Typical)

? Avalanche Energy, 30 mJ

? Eight Power DMOS Transistor Outputs of 100-mA

Continuous Current

? 250-mA Current Limit Capability

? ESD Protection, 2500 V

? Output Clamp Voltage, 33 V

? Enhanced Cascading for Multiple Stages

? All Registers Cleared With Single Input

? Low Power Consumption

2 Applications

? Instrumentation Clusters

? Tell-Tale Lamps

? LED Illumination and Controls

? Automotive Relay or Solenoids Drivers

3 Description

The TPIC6C596 device is a monolithic, medium-

voltage, low-current, 8-bit shift register designed for use in systems that require relatively moderate load

power such as LEDs. The device contains a built-in

voltage clamp on the outputs for inductive transient

protection. Power driver applications include relays,

solenoids, and other low-current or medium-voltage loads.

This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage

register. Data transfers through both the shift and

storage registers on the rising edge of the shift

register clock (SRCK) and the register clock (RCK),

respectively. The storage register transfers data to the output buffer when shift register clear (CLR) is

high. When CLR is low, all registers in the device are

cleared. When output enable (G) is held high, all data

in the output buffers is held low and all drain outputs

are off. When G is held low, data from the storage

register is transparent to the output buffers. When

data in the output buffers is low, the DMOS transistor

outputs are off. When data is high, the DMOS

transistor outputs have sink-current capability.

The serial output (SER OUT) is clocked out of the

device on the falling edge of SRCK to provide

additional hold time for cascaded applications. This

will provide improved performance for applications

where clock signals may be skewed, devices are not

located near one another, or the system must tolerate

electromagnetic interference.

Outputs are low-side, open-drain DMOS transistors

with output ratings of 33 V and 100 mA continuous

sink-current capability. Each output provides a 250-

mA maximum current limit at TC = 25°C. The current

limit decreases as the junction temperature increases

for additional device protection. The device also

provides up to 2500 V of ESD protection when tested

using the human body model and the 200-V machine

model.

The TPIC6C596 device is characterized for operation

over the operating case temperature range of ?40°C

to 125°C.

更新時(shí)間:2025-9-24 11:00:00
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