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位置:TPIC6A595DWR.A > TPIC6A595DWR.A詳情

TPIC6A595DWR.A中文資料

廠家型號(hào)

TPIC6A595DWR.A

文件大小

933.43Kbytes

頁面數(shù)量

21

功能描述

TPIC6A595 Power Logic 8-Bit Shift Register

數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

生產(chǎn)廠商

TI2

TPIC6A595DWR.A數(shù)據(jù)手冊(cè)規(guī)格書PDF詳情

1 Features

? Low rDS(on): 1Ω (Typical)

? Output short-circuit protection

? Avalanche energy: 75mJ

? Eight 350mA DMOS outputs

? 50V switching capability

? Devices are cascadable

? Low power consumption

2 Applications

? Instrumentation Clusters

? Tell-Tale Lamps

? LED Illumination and Controls

? Automotive Relay or Solenoids Drivers

3 Description

The TPIC6A595 is a monolithic, high-voltage, highcurrent

power logic 8-bit shift register designed for

use in systems that require relatively high load power.

The device contains a built-in voltage clamp on

the outputs for inductive transient protection. Power

driver applications include relays, solenoids, and

other medium-current or high-voltage loads. Each

open-drain DMOS transistor features an independent

chopping current-limiting circuit to prevent damage in

the case of a short circuit.

This device contains an 8-bit serial-in, parallel-out

shift register that feeds an 8-bit, D-type storage

register. Data transfers through both the shift and

storage registers on the rising edge of the shiftregister

clock (SRCK) and the register clock (RCK),

respectively. The storage register transfers data to

the output buffer when shift-register clear (SRCLR)

is high. Write data and read data are valid only

when RCK is low. When SRCLR is low, the input

shift register is cleared. When output enable (G) is

held high, all data in the output buffers is held low

and all drain outputs are off. When G is held low,

data from the storage register is transparent to the

output buffers. The serial output (SER OUT) allows

for cascading of the data from the shift register to

additional devices.

Outputs are low-side, open-drain DMOS transistors

with output ratings of 50V and a 350mA continuous

sink-current capability. When data in the output

buffers is low, the DMOS-transistor outputs are off.

When data is high, the DMOS-transistor outputs have

sink current capability.

Separate power ground (PGND) and logic ground

(LGND) terminals are provided to facilitate maximum

system flexibility. All PGND terminals are internally

connected, and each PGND terminal must be

externally connected to power system ground in

order to minimize parasitic impedence. A single-point

connection between LGND and PGND must be made

externally in a manner that reduces crosstalk between

the logic and load circuits.

The TPIC6A595 is offered in a thermally-enhanced

due-in-line (NE) package and a wide-body

surface-mount (DW) package. The TPIC6A595 is

characterized for operating over the operating case

termperau range of -40 to 125°C.

更新時(shí)間:2025-9-21 8:01:00
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原廠渠道,現(xiàn)貨配單
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全新原裝、誠(chéng)信經(jīng)營(yíng)、公司現(xiàn)貨銷售!
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25+
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原廠原裝,價(jià)格優(yōu)勢(shì)
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25+
SOP24
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代理渠道/支持實(shí)單/只做原裝
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