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位置:SNJ54BCT8374AFK.A > SNJ54BCT8374AFK.A詳情

SNJ54BCT8374AFK.A中文資料

廠家型號(hào)

SNJ54BCT8374AFK.A

文件大小

512.25Kbytes

頁(yè)面數(shù)量

27頁(yè)

功能描述

SCAN TEST DEVICES WITH OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS

數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

生產(chǎn)廠商

TI2

SNJ54BCT8374AFK.A數(shù)據(jù)手冊(cè)規(guī)格書(shū)PDF詳情

Members of the Texas Instruments

SCOPE ? Family of Testability Products

Octal Test-Integrated Circuits

Functionally Equivalent to ’F374 and

’BCT374 in the Normal-Function Mode

Compatible With the IEEE Standard

1149.1-1990 (JTAG) Test Access Port and

Boundary-Scan Architecture

Test Operation Synchronous to Test

Access Port (TAP)

Implement Optional Test Reset Signal by

Recognizing a Double-High-Level Voltage

(10 V) on TMS Pin

SCOPE ? Instruction Set

? IEEE Standard 1149.1-1990 Required

Instructions, Optional INTEST, CLAMP,

and HIGHZ

? Parallel-Signature Analysis at Inputs

? Pseudo-Random Pattern Generation

From Outputs

? Sample Inputs/Toggle Outputs

Package Options Include Plastic

Small-Outline (DW) Packages, Ceramic

Chip Carriers (FK), and Standard Plastic

(NT) and Ceramic (JT) 300-mil DIPs

description

The ’BCT8374A scan test devices with octal

edge-triggered D-type flip-flops are members of

the Texas Instruments SCOPE? testability

integrated-circuit family. This family of devices

supports IEEE Standard 1149.1-1990 boundary

scan to facilitate testing of complex circuit-board

assemblies. Scan access to the test circuitry is

accomplished via the 4-wire test access port

(TAP) interface.

In the normal mode, these devices are functionally equivalent to the ’F374 and ’BCT374 octal D-type flip-flops.

The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device

terminals or to perform a self test on the boundary-test cells. Activating the TAP in normal mode does not affect

the functional operation of the SCOPE? octal flip-flops.

In the test mode, the normal operation of the SCOPE? octal flip-flops is inhibited and the test circuitry is enabled

to observe and control the I/O boundary of the device. When enabled, the test circuitry can perform

boundary-scan test operations as described in IEEE Standard 1149.1-1990.

更新時(shí)間:2025-9-21 14:16:00
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