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位置:SN74LXC1T14QDCKRQ1.A > SN74LXC1T14QDCKRQ1.A詳情

SN74LXC1T14QDCKRQ1.A中文資料

廠家型號(hào)

SN74LXC1T14QDCKRQ1.A

文件大小

1077.42Kbytes

頁(yè)面數(shù)量

26頁(yè)

功能描述

SN74LXC1T14-Q1 Automotive Dual-Supply Inverting Translator with Schmitt-Trigger Input

數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

生產(chǎn)廠商

TI2

SN74LXC1T14QDCKRQ1.A數(shù)據(jù)手冊(cè)規(guī)格書(shū)PDF詳情

1 Features

? AEC-Q100 qualified for automotive applications

? Fully configurable dual-rail design allows each port

to operate from 1.1 V to 5.5 V

? Robust, glitch-free power supply sequencing

? Up to 420-Mbps support for 3.3 V to 5.0 V

? Schmitt-trigger inputs allow for slow or noisy inputs

? Input with integrated dynamic pull-down resistors

help reduce external component count

? High drive strength (up to 32 mA at 5 V)

? Low power consumption

– 3-μA maximum (25°C)

– 6-μA maximum (–40°C to 125°C)

? VCC isolation and Vcc disconnect (Ioff-float) feature

– If either VCC supply is < 100 mV or

disconnected, all I/O's get pulled-down and

then become high-impedance

? Overvoltage tolerant inputs accept voltages up to

5.5 V regardless of supply voltage.

? Ioff supports partial-power-down mode operation

? Operating temperature from –40°C to +125°C

? Latch-up performance exceeds 100 mA per JESD

78, class II

? ESD protection exceeds JESD 22

– 4000-V human-body model

– 1000-V charged-device model

2 Applications

? Eliminate slow or noisy input signals

? Driving indicator LEDs or buzzers

? Debouncing a mechanical switch

? General purpose I/O (GPIO) level shifting

3 Description

The SN74LXC1T14-Q1 is a single bit, dual-supply

inverting voltage level translation device with Schmitttrigger

input. The input pin A is referenced to VCCI

logic levels, and output pin Y is referenced to VCCO

logic levels. The input pin A is able to accept voltages

ranging from 1.1 V to 5.5 V and can be connected

directly to VCCI or GND. See Device Functional Modes

for a summary of the operation of the logic.

This device ensures low power consumption and

is fully specified for partial-power-down applications

using Ioff. The Ioff circuitry disables the outputs when

the device is powered down. This inhibits current

backflow into the device which prevents damage to

the device.

更新時(shí)間:2025-9-20 15:01:00
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