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位置:SN74LVTH16952DL.B > SN74LVTH16952DL.B詳情

SN74LVTH16952DL.B中文資料

廠家型號(hào)

SN74LVTH16952DL.B

文件大小

611.51Kbytes

頁(yè)面數(shù)量

18頁(yè)

功能描述

3.3-V ABT 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

生產(chǎn)廠商

TI2

SN74LVTH16952DL.B數(shù)據(jù)手冊(cè)規(guī)格書(shū)PDF詳情

Members of the Texas Instruments

WidebusE Family

State-of-the-Art Advanced BiCMOS

Technology (ABT) Design for 3.3-V

Operation and Low Static-Power

Dissipation

Support Mixed-Mode Signal Operation (5-V

Input and Output Voltages With 3.3-V VCC)

Support Unregulated Battery Operation

Down to 2.7 V

Typical VOLP (Output Ground Bounce)

<0.8 V at VCC = 3.3 V, TA = 25°C

Ioff and Power-Up 3-State Support Hot

Insertion

Bus Hold on Data Inputs Eliminates the

Need for External Pullup/Pulldown

Resistors

Distributed VCC and GND Pins Minimize

High-Speed Switching Noise

Flow-Through Architecture Optimizes PCB

Layout

Latch-Up Performance Exceeds 500 mA Per

JESD 17

ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

Package Options Include Plastic Shrink

Small-Outline (DL) and Thin Shrink

Small-Outline (DGG) Packages and 380-mil

Fine-Pitch Ceramic Flat (WD) Package

description

The ’LVTH16952 devices are 16-bit registered transceivers designed for low-voltage (3.3-V) VCC operation, but

with the capability to provide a TTL interface to a 5-V system environment.

These devices can be used as two 8-bit transceivers or one 16-bit transceiver. Data on the A or B bus is stored

in the registers on the low-to-high transition of the clock (CLKAB or CLKBA) input, provided that the clock-enable

(CLKENAB or CLKENBA) input is low. Taking the output-enable (OEAB or OEBA) input low accesses the data

on either port.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.

However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor;

the minimum value of the resistor is determined by the current-sinking capability of the driver.

These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry

disables the outputs, preventing damaging current backflow through the devices when they are powered down.

The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,

which prevents driver conflict.

The SN54LVTH16952 is characterized for operation over the full military temperature range of –55°C to 125°C.

The SN74LVTH16952 is characterized for operation from –40°C to 85°C.

更新時(shí)間:2025-9-22 15:47:00
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