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位置:SN74LVCZ240ADW.B > SN74LVCZ240ADW.B詳情

SN74LVCZ240ADW.B中文資料

廠家型號

SN74LVCZ240ADW.B

文件大小

714.26Kbytes

頁面數(shù)量

18

功能描述

OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

生產(chǎn)廠商

TI2

SN74LVCZ240ADW.B數(shù)據(jù)手冊規(guī)格書PDF詳情

FEATURES

· Operates From 2.7 V to 3.6 V

· Inputs Accept Voltages to 5.5 V

· Max tpd of 6.5 ns at 3.3 V

· Typical VOLP (Output Ground Bounce)

< 0.8 V at VCC = 3.3 V, TA = 25°C

· Typical VOHV (Output VOH Undershoot)

> 2 V at VCC = 3.3 V, TA = 25°C

· Ioff and Power-Up 3-State Support Hot

Insertion

· Supports Mixed-Mode Signal Operation on

All Ports (5-V Input/Output Voltage With

3.3-V VCC)

· Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

· ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

DESCRIPTION/ORDERING INFORMATION

This octal buffer/driver is designed for 2.7-V to 3.6-V VCC operation.

The SN74LVCZ240A is designed specifically to improve the performance and density of 3-state memory address

drivers, clock drivers, and bus-oriented receivers and transmitters.

This device is organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low,

the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the

high-impedance state.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in

a mixed 3.3-V/5-V system environment.

更新時間:2025-9-21 15:14:00
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原裝正品,支持實(shí)單