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SN74LVC161284DLR.A中文資料
SN74LVC161284DLR.A數(shù)據(jù)手冊規(guī)格書PDF詳情
1.4-kΩ Pullup Resistors Integrated on All
Open-Drain Outputs Eliminate the Need for
Discrete Resistors
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Designed for the IEEE Std 1284-I (Level 1
Type) and IEEE Std 1284-II (Level 2 Type)
Electrical Specifications
Flow-Through Architecture Optimizes PCB
Layout
Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin-Shrink
Small-Outline (DGG) Packages
description/ordering information
The SN74LVC161284 is designed for 3-V to 3.6-V
VCC operation. This device provides
asynchronous two-way communication between
data buses. The control-function implementation
minimizes external timing requirements.
This device has eight bidirectional bits; data can
flow in the A-to-B direction when DIR is high and
in the B-to-A direction when DIR is low. This
device also has five drivers, which drive the cable
side, and four receivers. The SN74LVC161284
has one receiver dedicated to the HOST LOGIC
line and a driver to drive the PERI LOGIC line.
The output drive mode is determined by the high-drive (HD) control pin. When HD is high, the outputs are in
a totem-pole configuration, and in an open-drain configuration when HD is low. This meets the drive
requirements as specified in the IEEE Std 1284-I (level 1 type) and IEEE Std 1284-II (level 2 type) parallel
peripheral-interface specifications. Except for HOST LOGIC IN and PERI LOGIC OUT, all cable-side pins have
a 1.4-kΩ integrated pullup resistor. The pullup resistor is switched off if the associated output driver is in the low
state or if the output voltage is above VCC CABLE. If VCC CABLE is off, PERI LOGIC OUT is set to low.
The device has two supply voltages. VCC is designed for 3-V to 3.6-V operation. VCC CABLE supplies the inputs
and output buffers of the cable side only and is designed for 3-V to 3.6-V and for 4.7-V to 5.5-V operation. Even
when VCC CABLE is 3 V to 3.6 V, the cable-side I/O pins are 5-V tolerant.
The SN74LVC161284 is characterized for operation from 0°C to 70°C.
供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
TI/德州儀器 |
23+ |
SSOP48 |
11200 |
原廠授權(quán)一級代理、全球訂貨優(yōu)勢渠道、可提供一站式BO |
|||
TI/德州儀器 |
24+ |
NA |
8600 |
正品原裝,正規(guī)渠道,免費送樣。支持賬期,BOM一站式配齊 |
|||
TI |
18+ |
TSSOP48 |
85600 |
保證進口原裝可開17%增值稅發(fā)票 |
|||
TI |
23+ |
QFP |
5000 |
原裝正品,假一罰十 |
|||
TI |
25+ |
SSOP |
18000 |
原廠直接發(fā)貨進口原裝 |
|||
TMS |
05+ |
SOIC |
1000 |
全新原裝 絕對有貨 |
|||
TI/德州儀器 |
2447 |
TSSOP |
100500 |
一級代理專營品牌!原裝正品,優(yōu)勢現(xiàn)貨,長期排單到貨 |
|||
TI&BB |
25+ |
TSSOP48 |
2659 |
原裝正品!公司現(xiàn)貨!歡迎來電洽談! |
|||
TI德州儀器 |
22+ |
24000 |
原裝正品現(xiàn)貨,實單可談,量大價優(yōu) |
||||
TI |
23+ |
NA |
2620 |
SN74LVC161284DLR.A 資料下載更多...
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Datasheet數(shù)據(jù)表PDF頁碼索引
- P1
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