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位置:SN74LVC138ADGVRG4.Z > SN74LVC138ADGVRG4.Z詳情

SN74LVC138ADGVRG4.Z中文資料

廠家型號(hào)

SN74LVC138ADGVRG4.Z

文件大小

2158.71Kbytes

頁(yè)面數(shù)量

40頁(yè)

功能描述

SN74LVC138A 3-Line to 8-Line Decoders Demultiplexers

數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

生產(chǎn)廠商

TI2

SN74LVC138ADGVRG4.Z數(shù)據(jù)手冊(cè)規(guī)格書PDF詳情

1 Features

1? Operate From 1.65 V to 3.6 V

? Inputs Accept Voltages to 5.5 V

? Max tpd of 5.8 ns at 3.3 V

? Typical VOLP (Output Ground Bounce)

< 0.8 V at VCC = 3.3 V, TA = 25°C

? Typical VOHV (Output VOH Undershoot)

> 2 V at VCC = 3.3 V, TA = 25°C

? Latch-Up Performance Exceeds 250 mA Per

JESD 17

2 Applications

? LED Displays

? Servers

? White Goods

? Power Infrastructure

? Building Automation

? Factory Automation

3 Description

The SN74LVC138A devices are designed for highperformance

memory-decoding or data-routing

applications requiring very short propagation delay

times. In high-performance memory systems, these

decoders minimize the effects of system decoding.

When employed with high-speed memories using a

fast enable circuit, delay times of these decoders and

the enable time of the memory usually are less than

the typical access time of the memory. This means

that the effective system delay introduced by the

decoders is negligible.

更新時(shí)間:2025-9-12 8:21:00
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