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位置:SN74LV132ADRE4.A > SN74LV132ADRE4.A詳情

SN74LV132ADRE4.A中文資料

廠家型號(hào)

SN74LV132ADRE4.A

文件大小

835.63Kbytes

頁(yè)面數(shù)量

28頁(yè)

功能描述

SNx4LV132A Quadruple Positive-NAND Gates With Schmitt-Trigger Inputs

數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

生產(chǎn)廠商

TI2

SN74LV132ADRE4.A數(shù)據(jù)手冊(cè)規(guī)格書(shū)PDF詳情

1 Features

1? 2-V to 5.5-V VCC Operation

? Max t pd of 9 ns at 5 V

? Typical VOLP (Output Ground Bounce) <0.8 V at

V CC = 3.3 V, TA = 25°C

? Typical VOHV (Output VOH Undershoot) >2.3 V at

VCC = 3.3 V, TA = 25°C

? Support Mixed-Mode Voltage Operation on All

Ports

? Latch-Up Performance Exceeds 250 mA per

JESD 17

? Ioff Supports Live Insertion, Partial Power-Down

Mode, and Back Drive Protection

? ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

2 Applications

? Industrial PC: Rugged PC and Laptop

? Access Control and Security: Camera

Surveillance IP Network

? Vending, Payment and Change Machines

? Patient Monitoring STB / DVR / Streaming Media

(Withdraw)

? Other Motor Drives (Such as Switch Reluctance)

3 Description

The 'LV132A devices are quadruple positive-NAND

gates designed for 2-V to 5.5-V VCC operation.

The 'LV132A devices perform the Boolean function Y

= A ? B or Y = A + B in positive logic.

Each circuit functions as a NAND gate, but because

of the Schmitt trigger, it has different input threshold

levels for positive- and negative-going signals.

These circuits are temperature compensated and can

be triggered from the slowest of input ramps and still

give clean jitter-free output signals.

更新時(shí)間:2025-9-24 8:30:00
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