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1 Features

? LSTTL input logic compatible

– VIL(max) = 0.8 V, VIH(min) = 2 V

? CMOS input logic compatible

– II ≤ 1 μA at VOL, VOH

? 4.5 V to 5.5 V operation

? Supports fanout up to 10 LSTTL loads

? Shift register has direct clear

? Extended ambient temperature range: –40°C to

+125°C, TA

2 Applications

? Output expansion

? LED matrix control

? 7-segment display control

? 8-bit data storage

3 Description

The SN74HCT595 device contains an 8-bit, serial-in,

parallel-out shift register that feeds an 8-bit D-type

storage register. The storage register has parallel

3-state outputs. Separate clocks are provided for

both the shift and storage register. The shift register

has a direct overriding clear (SRCLR) input, serial

(SER) input, and a serial output (QH') for cascading.

When the output-enable (OE) input is high, the

storage register outputs are in a high-impedance

state. Internal register data and serial output (QH') are

not impacted by the operation of the OE input.