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位置:SN74HCS137DR.A > SN74HCS137DR.A詳情

SN74HCS137DR.A中文資料

廠家型號(hào)

SN74HCS137DR.A

文件大小

1003.24Kbytes

頁(yè)面數(shù)量

26頁(yè)

功能描述

SN74HCS137 3- to 8-Line Decoder/Demultiplexer with Address Latches and Schmitt- Trigger Inputs

數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

生產(chǎn)廠商

TI2

SN74HCS137DR.A數(shù)據(jù)手冊(cè)規(guī)格書(shū)PDF詳情

1 Features

? Wide operating voltage range: 2 V to 6 V

? Schmitt-trigger inputs allow for slow or noisy input

signals

? Low power consumption

– Typical ICC of 100 nA

– Typical input leakage current of ±100 nA

? ±7.8-mA output drive at 6 V

? Extended ambient temperature range: –40°C to

+125°C, TA

2 Applications

? Memory device selection with shared data bus

? Reduce required number of outputs for chip select

applications

? Route data

3 Description

The SN74HCS137 is a three to eight decoder with

latched address inputs, one standard output strobe

(G0), and one active low output strobe (G 1). When

the latch enable (LE) input is low, the device acts as

a standard three to eight decoder. When the latch

enable (LE) input is high, the address latch retains its

previous state. When the outputs are gated by either

strobe input, they are all forced into the high state.

When the outputs are not disabled by one or both of

the strobe inputs, only the selected output is low while

all others are high.

更新時(shí)間:2025-9-23 15:13:00
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