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位置:SN74CB3Q16210DLR.B > SN74CB3Q16210DLR.B詳情

SN74CB3Q16210DLR.B中文資料

廠家型號

SN74CB3Q16210DLR.B

文件大小

518.28Kbytes

頁面數(shù)量

19

功能描述

20-BIT SWITCH 2.5-V/3.3-V LOW-VOLTAGE FET BUS SWITCH

數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

生產(chǎn)廠商

TI2

SN74CB3Q16210DLR.B數(shù)據(jù)手冊規(guī)格書PDF詳情

Member of the Texas Instruments

Widebus? Family

High-Bandwidth Data Path

Up To 500 MHz?)

5-V Tolerant I/Os with Device Powered Up

or Powered Down

Low and Flat ON-State Resistance (ron)

Characteristics Over Operating Range

ron = 5 Ω Typical)

Rail-to-Rail Switching on Data I/O Ports

? 0-V to 5-V Switching With 3.3-V VCC

? 0-V to 3.3-V Switching With 2.5-V VCC

Bidirectional Data Flow, With Near-Zero

Propagation Delay

Low Input/Output Capacitance Minimizes

Loading and Signal Distortion

Cio(OFF) = 4 pF Typical)

Fast Switching Frequency

fOE = 20 MHz Max)

Data and Control Inputs Provide

Undershoot Clamp Diodes

Low Power Consumption

ICC = 1 mA Typical)

VCC Operating Range From 2.3 V to 3.6 V

Data I/Os Support 0 V to 5 V Signaling

Levels (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V,

5 V)

Control Inputs Can be Driven by TTL or

5-V/3.3-V CMOS Outputs

Ioff Supports Partial-Power-Down Mode

Operation

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

ESD Performance Tested Per JESD 22

? 2000-V Human-Body Model

(A114-B, Class II)

? 1000-V Charged-Device Model (C101)

Supports Both Digital and Analog

Applications: PCI Interface, Differential

Signal Interface, Memory Interleaving, Bus

Isolation, Low-Distortion Signal Gating

description/ordering information

The SN74CB3Q16210 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage

of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance

allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The

device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data

bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q16210 provides an optimized

interface solution ideally suited for broadband communications, networking, and data-intensive computing

systems.

The SN74CB3Q16210 is organized as two 10-bit bus switches with separate output-enable (1OE, 2OE) inputs.

It can be used as two 10-bit bus switches or as one 20-bit bus switch. When OE is low, the associated 10-bit

bus switch is ON and the A port is connected to the B port, allowing bidirectional data flow between ports. When

OE is high, the associated 10-bit bus switch is OFF, and a high-impedance state exists between the A and B

ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging

current backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

更新時(shí)間:2025-9-20 15:01:00
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