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位置:SN74AUC2G04DCKR.B > SN74AUC2G04DCKR.B詳情

SN74AUC2G04DCKR.B中文資料

廠(chǎng)家型號(hào)

SN74AUC2G04DCKR.B

文件大小

703.22Kbytes

頁(yè)面數(shù)量

19頁(yè)

功能描述

DUAL INVERTER GATE

數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠(chǎng)下載

生產(chǎn)廠(chǎng)商

TI2

SN74AUC2G04DCKR.B數(shù)據(jù)手冊(cè)規(guī)格書(shū)PDF詳情

Available in the Texas Instruments

NanoStar? and NanoFree? Packages

Optimized for 1.8-V Operation and Is 3.6-V

I/O Tolerant to Support Mixed-Mode Signal

Operation

Ioff Supports Partial-Power-Down Mode

Operation

Sub 1-V Operable

Max tpd of 1.7 ns at 1.8 V

Low Power Consumption, 10 μA at 1.8 V

±8-mA Output Drive at 1.8 V

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

description/ordering information

This dual inverter is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC

operation.

The SN74AUC2G04 performs the Boolean function Y = A.

NanoStar? and NanoFree? package technology is a major breakthrough in IC packaging concepts, using the

die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

更新時(shí)間:2025-9-21 15:14:00
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