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位置:SN74ALVCH245DGVR.B > SN74ALVCH245DGVR.B詳情

SN74ALVCH245DGVR.B中文資料

廠家型號

SN74ALVCH245DGVR.B

文件大小

679.61Kbytes

頁面數(shù)量

18

功能描述

OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

生產(chǎn)廠商

TI2

SN74ALVCH245DGVR.B數(shù)據(jù)手冊規(guī)格書PDF詳情

FEATURES

· Operates From 1.65 V to 3.6 V

· Max tpd of 3.4 ns at 3.3 V

· ±24-mA Output Drive at 3.3 V

· Bus Hold on Data Inputs Eliminates the Need

for External Pullup/Pulldown Resistors

· Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

DESCRIPTION/ORDERING INFORMATION

This octal bus transceiver is designed for 1.65-V to

3.6-V VCC operation.

The SN74ALVCH245 is designed for asynchronous

communication between data buses. The device

transmits data from the A bus to the B bus or from

the B bus to the A bus, depending on the logic level

at the direction-control (DIR) input. The output-enable

(OE) input can be used to disable the device so the

buses are effectively isolated.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors

with the bus-hold circuitry is not recommended.

更新時間:2025-9-21 14:08:00
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