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FEATURES

· Member of the Texas Instruments Widebus?

Family

· EPIC? (Enhanced-Performance Implanted

CMOS) Submicron Process

· ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

· Latch-Up Performance Exceeds 500 mA Per

JESD 17

· Bus Hold on Data Inputs Eliminates the Need

for External Pullup/Pulldown Resistors

· Package Options Include Plastic 300-mil

Shrink Small-Outline (DL), Thin Shrink

Small-Outline (DGG), and Thin Very

Small-Outline (DGV) Packages

DESCRIPTION

This 16-bit registered transceiver is designed for

1.65-V to 3.6-V VCC operation.

The SN74ALVCH16952 contains two sets of D-type

flip-flops for temporary storage of data flowing in

either direction. This device can be used as two 8-bit

transceivers or one 16-bit transceiver. Data on the A

or B bus is stored in the registers on the low-to-high

transition of the clock (CLKAB or CLKBA) input,

provided that the clock-enable (CLKENAB or

CLKENBA) input is low. Taking the output-enable

(OEAB or OEBA) input low accesses the data on

either port.

To ensure the high-impedance state during power up

or power down, OE should be tied to VCC through a

pullup resistor; the minimum value of the resistor is

determined by the current-sinking capability of the

driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The SN74ALVCH16952 is characterized for operation from -40°C to 85°C.