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Members of the Texas Instruments

WidebusE Family

EPIC E (Enhanced-Performance Implanted

CMOS) Process

Operating Range 2-V to 5.5-V VCC

Distributed VCC and GND Pins Minimize

High-Speed Switching Noise

Flow-Through Architecture Optimizes PCB

Layout

Latch-Up Performance Exceeds 250 mA Per

JESD 17

Package Options Include Plastic Shrink

Small-Outline (DL), Thin Shrink

Small-Outline (DGG), and Thin Very

Small-Outline (DGV) Packages and 380-mil

Fine-Pitch Ceramic Flat (WD) Package

Using 25-mil Center-to-Center Spacings

description

The ’AHC16240 devices are 16-bit buffers and

line drivers designed specifically to improve the

performance and density of 3-state memory

address drivers, clock drivers, and bus-oriented

receivers and transmitters.

These devices can be used as four 4-bit buffers,

two 8-bit buffers, or one 16-bit buffer. They provide

inverting outputs and symmetrical active-low

output-enable (OE) inputs.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54AHC16240 is characterized for operation over the full military temperature range of –55°C to 125°C.

The SN74AHC16240 is characterized for operation from –40°C to 85°C.