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位置:SN74ACT2229DW.A > SN74ACT2229DW.A詳情

SN74ACT2229DW.A中文資料

廠家型號

SN74ACT2229DW.A

文件大小

309.35Kbytes

頁面數(shù)量

16

功能描述

DUAL 64 × 1, DUAL 256 × 1 FIRST-IN, FIRST-OUT MEMORIES

數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

生產(chǎn)廠商

TI2

SN74ACT2229DW.A數(shù)據(jù)手冊規(guī)格書PDF詳情

Dual Independent FIFOs Organized as:

64 Words by 1 Bit Each – SN74ACT2227

256 Words by 1 Bit Each – SN74ACT2229

Free-Running Read and Write Clocks Can

Be Asynchronous or Coincident on Each

FIFO

Input-Ready Flags Synchronized to Write

Clocks

Output-Ready Flags Synchronized to Read

Clocks

Half-Full and Almost-Full/Almost-Empty

Flags

Support Clock Frequencies up to 60 MHz

Access Times of 9 ns

3-State Data Outputs

Low-Power Advanced CMOS Technology

Packaged in 28-Pin SOIC Package

description

The SN74ACT2227 and SN74ACT2229 are dual FIFOs suited for a wide range of serial-data buffering

applications including elastic stores for frequencies up to OC-1 telecommunication rates. Each FIFO on the chip

is arranged as 64 × 1 (SN74ACT2227) or 256 × 1 (SN74ACT2229) and has control signals and status flags for

independent operation. Output flags for each FIFO include input ready (1IR or 2IR), output ready (1OR or 2OR),

half full (1HF or 2HF), and almost full/almost empty (1AF/AE or 2AF/AE).

Serial data is written into a FIFO on the low-to-high transition of the write-clock (1WRTCLK or 2WRTCLK) input

when the write-enable (1WRTEN or 2WRTEN) input and input-ready flag (1IR or 2IR) output are both high.

Serial data is read from a FIFO on the low-to-high transition of the read-clock (1RDCLK or 2RDCLK) input when

the read-enable (1RDEN or 2RDEN) input and output-ready flag (1OR or 2OR) output are both high. The read

and write clocks of a FIFO can be asynchronous to one another. A FIFO data output (1Q or 2Q) is in the

high-impedance state when its output-enable (1OE or 2OE) input is low.

Each input-ready flag (1IR or 2IR) is synchronized by two flip-flop stages to its write clock (1WRTCLK or

2WRTCLK), and each output-ready flag (1OR or 2OR) is synchronized by three flip-flop stages to its read clock

(1RDCLK or 2RDCLK). This multistage synchronization ensures reliable flag-output states when data is written

and read asynchronously.

A half-full flag (1HF or 2HF) is high when the number of bits stored in its FIFO is greater than or equal to half

the depth of the FIFO. An almost-full/almost-empty flag (1AF/AE or 2AF/AE) is high when eight or fewer bits

are stored in its FIFO and when eight or fewer empty locations are left in the FIFO. A bit present on the data

output is not stored in the FIFO.

The SN74ACT2227 and SN74ACT2229 are characterized for operation from –40°C to 85°C.

For more information on this device family, see the application report FIFOs With a Word Width of One Bit

(literature number SCAA006).

更新時間:2025-9-21 15:14:00
供應(yīng)商 型號 品牌 批號 封裝 庫存 備注 價格
TexasInstruments
18+
ICDUAL256X1FIFOMEM28-SOI
6800
公司原裝現(xiàn)貨/歡迎來電咨詢!
Texas Instruments
24+
28-SOIC
53200
一級代理/放心采購
TI(德州儀器)
2447
SOIC-28
315000
1000個/圓盤一級代理專營品牌!原裝正品,優(yōu)勢現(xiàn)貨,
TI
20+
SOP-28
1000
就找我吧!--邀您體驗(yàn)愉快問購元件!
TI(德州儀器)
2021+
SOIC-28
499
TI
22+
28SOIC
9000
原廠渠道,現(xiàn)貨配單
TI(德州儀器)
23+
SOIC-28
9990
原裝正品,支持實(shí)單
TI(德州儀器)
24+
SOIC28
7350
現(xiàn)貨供應(yīng),當(dāng)天可交貨!免費(fèi)送樣,原廠技術(shù)支持!!!
TI(德州儀器)
24+
SOIC28
2181
原裝現(xiàn)貨,免費(fèi)供樣,技術(shù)支持,原廠對接
TI(德州儀器)
24+
SOIC-28
690000
代理渠道/支持實(shí)單/只做原裝