国产精品久久久久无码av色戒,大帝av在线一区二区三区,国产肥熟女视频一区二区三区,大陆少妇xxxx做受,被黑人猛躁10次高潮视频

Controlled Baseline

– One Assembly/Test Site, One Fabrication

Site

Extended Temperature Performance of

–40°C to 125°C

Enhanced Diminishing Manufacturing

Sources (DMS) Support

Enhanced Product Change Notification

Qualification Pedigree?

Member of the Texas Instruments

Widebus Family

Inputs Are TTL-Voltage Compatible

3-State Bus Driving True Outputs

Full Parallel Access for Loading

Distributed VCC and GND Pins Minimize

High-Speed Switching Noise

description

The SN74ACT16373Q-EP is a 16-bit D-type

transparent latch with 3-state outputs, designed

specifically for driving highly capacitive or

relatively low-impedance loads. It is particularly

suitable for implementing buffer registers, I/O

ports, bidirectional bus drivers, and working

registers.

This device can be used as two 8-bit latches or one 16-bit latch. The Q outputs of the latches follow the data

(D) inputs if the latch-enable (LE) input is taken high. When LE is taken low, the Q outputs are latched at the

levels set up at the D inputs.

A buffered output-enable (OE) input can be used to place the outputs in either a normal logic state (high or low

logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the

bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines

in a bus-organized system, without need for interface or pullup components.

OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered

while the outputs are in the high-impedance state.