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位置:SN74ABT823DBR.B > SN74ABT823DBR.B詳情

SN74ABT823DBR.B中文資料

廠家型號

SN74ABT823DBR.B

文件大小

385.69Kbytes

頁面數(shù)量

16

功能描述

9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

生產(chǎn)廠商

TI2

SN74ABT823DBR.B數(shù)據(jù)手冊規(guī)格書PDF詳情

State-of-the-Art EPIC-IIBE BiCMOS Design

Significantly Reduces Power Dissipation

ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

Latch-Up Performance Exceeds 500 mA Per

JEDEC Standard JESD-17

Typical VOLP (Output Ground Bounce) < 1 V

at VCC = 5 V, TA = 25°C

High-Impedance State During Power Up

and Power Down

High-Drive Outputs (–32-mA IOH, 64-mA IOL)

Buffered Control Inputs to Reduce

dc Loading Effects

Package Options Include Plastic

Small-Outline (DW) and Shrink

Small-Outline (DB) Packages, Ceramic Chip

Carriers (FK) and Flatpacks (W), and

Standard Plastic (NT) and Ceramic (JT)

DIPs

description

These 9-bit flip-flops feature 3-state outputs

designed specifically for driving highly capacitive

or relatively low-impedance loads. They are

particularly suitable for implementing wider buffer

registers, I/O ports, bidirectional bus drivers with

parity, and working registers.

With the clock-enable (CLKEN) input low, the nine

D-type edge-triggered flip-flops enter data on the

low-to-high transitions of the clock. Taking CLKEN

high disables the clock buffer, thus latching the

outputs. Taking the clear (CLR) input low causes

the nine Q outputs to go low, independently of the

clock.

A buffered output-enable (OE) input can be used to place the nine outputs in either a normal logic state (high

or low logic level) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive

the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines

without need for interface or pullup components.

When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.

However, to ensure the high-impedance state above 2.1 V, OE should be tied to VCC through a pullup resistor;

the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABT823 is characterized for operation over the full military temperature range of –55°C to 125°C. The

SN74ABT823 is characterized for operation from –40°C to 85°C.

更新時(shí)間:2025-9-21 13:58:00
供應(yīng)商 型號 品牌 批號 封裝 庫存 備注 價(jià)格
TI
25+
SSOP24
171
百分百原裝正品 真實(shí)公司現(xiàn)貨庫存 本公司只做原裝 可
Texas Instruments
24+
24-SSOP(0.209
56300
TI
20+
IC
2000
就找我吧!--邀您體驗(yàn)愉快問購元件!
TI(德州儀器)
2021+
SSOP-24
499
TI
22+
24SSOP
9000
原廠渠道,現(xiàn)貨配單
TI(德州儀器)
23+
SSOP-24
9990
原裝正品,支持實(shí)單
TI(德州儀器)
24+
SSOP24208mil
7350
現(xiàn)貨供應(yīng),當(dāng)天可交貨!免費(fèi)送樣,原廠技術(shù)支持!!!
TI(德州儀器)
24+
SSOP24208mil
2886
原裝現(xiàn)貨,免費(fèi)供樣,技術(shù)支持,原廠對接
TI(德州儀器)
24+
SSOP-24-208mil
690000
代理渠道/支持實(shí)單/只做原裝
24+
N/A
48000
一級代理-主營優(yōu)勢-實(shí)惠價(jià)格-不悔選擇