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位置:SN74ABT652ADBR.B > SN74ABT652ADBR.B詳情

SN74ABT652ADBR.B中文資料

廠家型號

SN74ABT652ADBR.B

文件大小

404.67Kbytes

頁面數(shù)量

19

功能描述

OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

生產(chǎn)廠商

TI2

SN74ABT652ADBR.B數(shù)據(jù)手冊規(guī)格書PDF詳情

State-of-the-Art EPIC-IIBE BiCMOS Design

Significantly Reduces Power Dissipation

ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

Latch-Up Performance Exceeds 500 mA Per

JEDEC Standard JESD-17

Typical VOLP (Output Ground Bounce)

< 1 V at VCC = 5 V, TA = 25°C

High-Drive Outputs (–32-mA IOH, 64-mA IOL)

Package Options Include Plastic

Small-Outline (DW), Shrink Small-Outline

(DB), and Thin Shrink Small-Outline (PW)

Packages, Ceramic Chip Carriers (FK),

Ceramic Flat (W) Package, and Plastic (NT)

and Ceramic (JT) DIPs

description

These devices consist of bus-transceiver circuits,

D-type flip-flops, and control circuitry arranged for

multiplexed transmission of data directly from the

data bus or from the internal storage registers.

Output-enable (OEAB and OEBA) inputs are

provided to control the transceiver functions.

Select-control (SAB and SBA) inputs are provided

to select either real-time or stored data for

transfer. The circuitry used for select control

eliminates the typical decoding glitch that occurs

in a multiplexer during the transition between

stored and real-time data. A low input selects

real-time data, and a high input selects stored

data. Figure 1 illustrates the four fundamental

bus-management functions that can be

performed with the ’ABT652A.

Data on the A- or B-data bus, or both, can be stored in the internal D-type flip-flops by low-to-high transitions

at the appropriate clock (CLKAB or CLKBA) inputs, regardless of the select- or enable-control inputs. When SAB

and SBA are in the real-time transfer mode, it is possible to store data without using the internal D-type flip-flops

by simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input. When all

other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last

state.

To ensure the high-impedance state during power up or power down, OEBA should be tied to VCC through a

pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver

(B to A). OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is

determined by the current-sourcing capability of the driver (A to B).

更新時間:2025-9-21 15:14:00
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原裝優(yōu)勢絕對有貨