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SN74ABT16646DGGR.B中文資料
SN74ABT16646DGGR.B數(shù)據(jù)手冊規(guī)格書PDF詳情
Members of the Texas Instruments
WidebusE Family
State-of-the-Art EPIC-IIBE BiCMOS Design
Significantly Reduces Power Dissipation
Latch-Up Performance Exceeds 500 mA Per
JESD 17
Typical VOLP (Output Ground Bounce) < 1 V
at VCC = 5 V, TA = 25°C
Distributed VCC and GND Pin Configuration
Minimizes High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB
Layout
High-Drive Outputs (–32-mA IOH, 64-mA IOL)
Package Options Include Plastic Shrink
Small-Outline (DL), Thin Shrink
Small-Outline (DGG) Packages and 380-mil
Fine-Pitch Ceramic Flat (WD) Package
Using 25-mil Center-to-Center Spacings
description
The ’ABT16646 devices consist of
bus-transceiver circuits, D-type flip-flops, and
control circuitry arranged for multiplexed
transmission of data directly from the input bus or
from the internal registers.
These devices can be used as two 8-bit
transceivers or one 16-bit transceiver. Data on the
A or B bus is clocked into the registers on the
low-to-high transition of the appropriate clock
(CLKAB or CLKBA) input. Figure 1 illustrates the
four fundamental bus-management functions that
can be performed with the ’ABT16646 devices.
Output-enable (OE) and direction-control (DIR) inputs are provided to control the transceiver functions. In the
transceiver mode, data present at the high-impedance port may be stored in either register or in both. The
select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. The circuitry
used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition
between stored and real-time data. The direction control (DIR) determines which bus receives data when OE
is low. In the isolation mode (OE high), A data can be stored in one register and/or B data can be stored in the
other register.
When an output function is disabled, the input function is still enabled and can be used to store and transmit
data. Only one of the two buses, A or B, can be driven at a time.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
供應商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
24+ |
3000 |
自己現(xiàn)貨 |
|||||
TexasInstruments |
18+ |
ICBUSTRANSCVR16BIT56SSOP |
6800 |
公司原裝現(xiàn)貨/歡迎來電咨詢! |
|||
Texas Instruments |
24+ |
56-SSOP |
65200 |
一級代理/放心采購 |
|||
TI |
20+ |
SSOP-56 |
200 |
就找我吧!--邀您體驗愉快問購元件! |
|||
TI(德州儀器) |
2021+ |
SSOP-56 |
499 |
||||
TI/德州儀器 |
23+ |
SOP |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
|||
TI |
22+ |
56SSOP |
9000 |
原廠渠道,現(xiàn)貨配單 |
|||
TI(德州儀器) |
23+ |
SSOP-56 |
9990 |
原裝正品,支持實單 |
|||
TI |
23+ |
SOP |
3200 |
正規(guī)渠道,只有原裝! |
|||
TI/德州儀器 |
24+ |
SSOP-56 |
21465 |
只供應原裝正品 歡迎詢價 |
SN74ABT16646DGGR.B 資料下載更多...
SN74ABT16646DGGR.B 芯片相關型號
- 7203E
- AMT332S-0400-1200-02-CW
- AMT332S-0400-1200-02-CW-S
- AMT332S-0400-1200-04-CW
- AMT332S-0400-120004-CW-S
- AMT332S-0400-1200-06-CW
- AMT332S-0400-120006-CW-S
- DSF500
- M2AMS-16B-M2
- M2AMS-16B-M2SLASHCE
- M2AMS-16B-M2SLASHN
- M2AMS-16B-M2SLASHQ
- M2AMS-16B-M2SLASHUL
- M2AMS-16B-P
- M2AMS-16B-PSLASHCE
- M2AMS-16B-PSLASHN
- P206AMY001
- P206AMY002
- P206Y001
- SN74ABT16646DGGR
- SN74ABT16646DL.B
- SN74ABT16646DLR
- SN74ABT16646DLR.B
- SN74CBTLV16292DL.B
- SN74CBTLV16292DLR
- SN74CBTLV16292DLR.B
- SN74CBTLV16292GR
- SN74CBTLV16292GR.B
- UCS2C330MPD
- UCS2C331MHD
Datasheet數(shù)據(jù)表PDF頁碼索引
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