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SN74ABT16374ADGGR.B中文資料
SN74ABT16374ADGGR.B數(shù)據(jù)手冊規(guī)格書PDF詳情
Members of the Texas Instruments
WidebusE Family
State-of-the-Art EPIC-IIBE BiCMOS Design
Significantly Reduces Power Dissipation
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015
Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC = 5 V, TA = 25°C
High-Impedance State During Power Up
and Power Down
Distributed VCC and GND Pin Configuration
Minimizes High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB
Layout
High-Drive Outputs (–32-mA IOH, 64-mA IOL)
Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages and 380-mil
Fine-Pitch Ceramic Flat (WD) Package
Using 25-mil Center-to-Center Spacings
description
The ’ABT16374A are 16-bit edge-triggered
D-type flip-flops with 3-state outputs designed
specifically for driving highly capacitive or
relatively low-impedance loads. They are
particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
These devices can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock
(CLK) input, the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus
lines without need for interface or pullup components
OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while
the outputs are in the high-impedance state.
When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 2.1 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABT16374A is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74ABT16374A is characterized for operation from –40°C to 85°C.
供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
TI |
16+ |
TSSOP-48 |
8000 |
原裝現(xiàn)貨請來電咨詢 |
|||
TI |
24+ |
TSSOP-48 |
90000 |
一級代理商進(jìn)口原裝現(xiàn)貨、假一罰十價格合理 |
|||
TI |
23+ |
TSSOP-48 |
21729 |
公司原裝現(xiàn)貨!主營品牌!可含稅歡迎查詢 |
|||
TI/德州儀器 |
23+ |
TSSOP48 |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
|||
24+ |
SOP |
15 |
|||||
TEXASINSTRU |
24+ |
原封裝 |
4636 |
原裝現(xiàn)貨假一罰十 |
|||
TI |
SOP |
298 |
正品原裝--自家現(xiàn)貨-實單可談 |
||||
TI |
25+ |
97+ |
288 |
百分百原裝正品 真實公司現(xiàn)貨庫存 本公司只做原裝 可 |
|||
TI |
2016+ |
SSOP |
1800 |
只做原裝,假一罰十,公司可開17%增值稅發(fā)票! |
|||
TI |
1706+ |
? |
6500 |
只做原裝進(jìn)口,假一罰十 |
SN74ABT16374ADGGR.B 資料下載更多...
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