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位置:SN74ABT162827ADGGR.B > SN74ABT162827ADGGR.B詳情

SN74ABT162827ADGGR.B中文資料

廠家型號

SN74ABT162827ADGGR.B

文件大小

603.15Kbytes

頁面數(shù)量

16

功能描述

20-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

生產(chǎn)廠商

TI2

SN74ABT162827ADGGR.B數(shù)據(jù)手冊規(guī)格書PDF詳情

Members of the Texas Instruments

Widebus? Family

Output Ports Have Equivalent 25-Ω Series

Resistors, So No External Resistors Are

Required

High-Impedance State During Power Up

and Power Down

Typical VOLP (Output Ground Bounce)

<1 V at VCC = 5 V, TA = 25°C

Distributed VCC and GND Pins Minimize

High-Speed Switching Noise

Ioff and Power-Up 3-State Support Hot

Insertion

Flow-Through Architecture Optimizes PCB

Layout

Latch-Up Performance Exceeds 500 mA Per

JEDEC Standard JESD-17

ESD Protection Exceeds JESD 22

? 2000-V Human-Body Model (A114-A)

? 200-V Machine Model (A115-A)

description/ordering information

The ’ABT162827A devices are noninverting

20-bit buffers composed of two 10-bit buffers with

separate output-enable signals. For either 10-bit

buffer, the two output-enable (1OE1 and 1OE2, or

2OE1 and 2OE2) inputs must both be low for the

corresponding Y outputs to be active. If either

output-enable input is high, the outputs of that

10-bit buffer are in the high-impedance state.

The outputs, which are designed to source or sink

up to 12 mA, include equivalent 25-Ω series

resistors to reduce overshoot and undershoot.

更新時間:2025-9-20 10:01:00
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TI
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TI
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TI
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TSSOP-56
21721
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NA/
4142
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ADI
23+
TSSOP-56
8000
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TexasInstruments
18+
ICBUFF/DVRTRI-ST20BIT56S
6800
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Texas Instruments
24+
56-SSOP
65200
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SSOP56
100500
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TI
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SSOP-56
3854
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