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SN65MLVD080DGGR.B中文資料
SN65MLVD080DGGR.B數(shù)據(jù)手冊規(guī)格書PDF詳情
FEATURES
· Low-Voltage Differential 30-W to 55-W Line
Drivers and Receivers for Signaling Rates (1)
Up to 250 Mbps; Clock Frequencies Up to
125 MHz
· Meets or Exceeds the M-LVDS Standard
TIA/EIA-899 for Multipoint Data Interchange
· Controlled Driver Output Voltage Transition
Times for Improved Signal Quality
· –1 V to 3.4 V Common-Mode Voltage Range
Allows Data Transfer With 2 V of Ground
Noise
· Bus Pins High Impedance When Driver
Disabled or V CC £ 1.5 V
· Independent Enables for each Driver
· Bus Pin ESD Protection Exceeds 8 kV
· Packaged in 64-Pin TSSOP (DGG)
· M-LVDS Bus Power Up/Down Glitch Free
APPLICATIONS
· Parallel Multipoint Data and Clock
Transmission Via Backplanes and Cables
· Low-Power High-Speed Short-Reach
Alternative to TIA/EIA-485
· Cellular Base Stations
· Central-Office Switches
· Network Switches and Routers
DESCRIPTION
The SN65MLVD080 and SN65MLVD082 provide
eight half-duplex transceivers for transmitting and
receiving Multipoint-Low-Voltage Differential Signals
in full compliance with the TIA/EIA-899 (M-LVDS)
standard, which are optimized to operate at signaling
rates up to 250 Mbps. The driver outputs have been
designed to support multipoint buses presenting
loads as low as 30-W and incorporates controlled
transition times to allow for stubs off of the backbone
transmission line.
The M-LVDS standard defines two types of receivers,
designated as Type-1 and Type-2. Type-1 receivers
(SN65MLVD080) have thresholds centered about
zero with 25 mV of hysteresis to prevent output
oscillations with loss of input; Type-2 receivers
(SN65MLVD082) implement a failsafe by using an
offset threshold. In addition, the driver rise and fall
times are between 1 and 2.0 ns, complying with the
M-LVDS standard to provide operation at 250 Mbps
while also accommodating stubs on the bus. Receiver outputs are slew rate controlled to reduce EMI and
crosstalk effects associated with large current surges.
The M-LVDS standard allows for 32 nodes on the bus
providing a high-speed replacement for RS-485
where lower common-mode can be tolerated or when
higher signaling rates are needed.
The driver logic inputs and the receiver logic outputs
are on separate pins rather than tied together as in
some transceiver designs. The drivers have separate
enables (DE) and the receivers are enabled globally
through (RE). This arrangement of separate logic
inputs, logic outputs, and enable pins allows for a
listen-while-talking operation. The devices are
characterized for operation from –40°C to 85°C.
供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
TI/TEXAS |
23+ |
原廠封裝 |
8931 |
||||
TI |
24+ |
TSSOP64 |
7 |
||||
TI |
25+ |
TSSOP64 |
4500 |
百分百原裝正品 真實公司現(xiàn)貨庫存 本公司只做原裝 可 |
|||
TexasInstruments |
18+ |
ICMLVDSTXRX8CH1/2DUP64TS |
6800 |
公司原裝現(xiàn)貨/歡迎來電咨詢! |
|||
TI |
三年內(nèi) |
1983 |
只做原裝正品 |
||||
Texas Instruments |
24+ |
64-TSSOP |
65200 |
一級代理/放心采購 |
|||
TI(德州儀器) |
2447 |
TSSOP-64 |
315000 |
2000個/圓盤一級代理專營品牌!原裝正品,優(yōu)勢現(xiàn)貨, |
|||
TI |
20+ |
SSOP-64 |
2000 |
就找我吧!--邀您體驗愉快問購元件! |
|||
TI(德州儀器) |
2021+ |
TSSOP-64 |
499 |
||||
TI |
22+ |
64TSSOP |
9000 |
原廠渠道,現(xiàn)貨配單 |
SN65MLVD080DGGR.B 資料下載更多...
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Datasheet數(shù)據(jù)表PDF頁碼索引
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