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SN65LVDS116DGGRG4.B中文資料
SN65LVDS116DGGRG4.B數(shù)據(jù)手冊規(guī)格書PDF詳情
FEATURES
· One Receiver and Sixteen Line Drivers Meet
or Exceed the Requirements of ANSI
EIA/TIA-644 Standard
· Typical Data Signaling Rates to 400 Mbps or
Clock Frequencies to 400 MHz
· Enabling Logic Allows Separate Control of
Each Bank of Four Channels or 2-Bit
Selection of Any One of the Four Banks
· Low-Voltage Differential Signaling With
Typical Output Voltage of 350 mV and a 100-W
Load
· Electrically Compatible With LVDS, PECL,
LVPECL, LVTTL, LVCMOS, GTL, BTL, CTT,
SSTL, or HSTL Outputs With External
Termination Networks
· Propagation Delay Times < 4.7 ns
· Output Skew Is < 300 ps and Part-to-Part
Skew < 1.5 ns
· Total Power Dissipation Typically 470 mW
With All Ports Enabled and at 200 MHz
· Driver Outputs or Receiver Input Is High
Impedance When Disabled or With VCC < 1.5
V
· Bus-Pin ESD Protection Exceeds 12 kV
· Packaged in Thin Shrink Small-Outline
Package With 20-Mil Terminal Pitch
DESCRIPTION
The SN65LVDS116 is one differential line receiver
connected to sixteen differential line drivers that
implement the electrical characteristics of low-voltage
differential signaling (LVDS). LVDS, as specified in
EIA/TIA-644, is a data signaling technique that offers
the low-power, low-noise coupling, and fast switching
speeds to transmit data at relatively long distances.
(Note: The ultimate rate and distance of data transfer
is dependent upon the attenuation characteristics of
the media, the noise coupling to the environment, and
other system characteristics.)
The intended application of this device and signaling
technique is for point-to-point or multidrop baseband
data transmission over controlled impedance media of approximately 100 W. The transmission media may
be printed-circuit board traces, backplanes, or cables.
The large number of drivers integrated into the same
substrate along with the low pulse skew of balanced
signaling, allows extremely precise timing alignment
of the signals repeated from the input. This is
particularly advantageous in system clock distribution.
The SN65LVDS116 is characterised for operation
from –40°C to 85°C.
供應商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
TI德州儀器 |
22+ |
24000 |
原裝正品現(xiàn)貨,實單可談,量大價優(yōu) |
||||
TEXASINSTRU |
24+ |
2443 |
原裝現(xiàn)貨假一罰十 |
||||
TI/TEXAS |
23+ |
原廠封裝 |
8931 |
||||
24+ |
3000 |
自己現(xiàn)貨 |
|||||
TexasInstruments |
18+ |
ICDL8PORTLVDSREPEAT64-TS |
6800 |
公司原裝現(xiàn)貨/歡迎來電咨詢! |
|||
Texas Instruments |
24+ |
64-TSSOP |
56300 |
一級代理/放心采購 |
|||
TI |
20+ |
SSOP-64 |
50 |
就找我吧!--邀您體驗愉快問購元件! |
|||
TI |
22+ |
64TSSOP |
9000 |
原廠渠道,現(xiàn)貨配單 |
|||
TI(德州儀器) |
24+ |
TSSOP646.1mm |
7350 |
現(xiàn)貨供應,當天可交貨!免費送樣,原廠技術支持!!! |
|||
TI |
2025+ |
TSSOP64 |
3785 |
全新原廠原裝產(chǎn)品、公司現(xiàn)貨銷售 |
SN65LVDS116DGGRG4.B 資料下載更多...
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Datasheet數(shù)據(jù)表PDF頁碼索引
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