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位置:SN65LVDM31DR.B > SN65LVDM31DR.B詳情

SN65LVDM31DR.B中文資料

廠家型號

SN65LVDM31DR.B

文件大小

237.13Kbytes

頁面數(shù)量

13

功能描述

HIGH-SPEED DIFFERENTIAL LINE DRIVER

數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

生產(chǎn)廠商

TI2

SN65LVDM31DR.B數(shù)據(jù)手冊規(guī)格書PDF詳情

FEATURES

· Designed for Signaling Rates

NOTE: The signaling rate is the number of voltage transitions that

can be made per second.

Up to 150 Mbps

· Low-Voltage Differential Signaling With

Typical Output Voltage of 700 mV and a 100-W

Load

· Propagation Delay Time of 2.3 ns, Typical

· Single 3.3-V Supply Operation

· One Driver's Power Dissipation at 75 MHz,

50 mW, Typical

· High-Impedance Outputs When Disabled or

With VCC < 1.5 V

· Bus-Pin ESD Protection Exceeds 12 kV

· Low-Voltage CMOS (LVCMOS) Logic Input

Levels Are 5-V Tolerant

DESCRIPTION

The SN65LVDM31 incorporates four differential line

drivers that implement the electrical characteristics of

low-voltage differential signaling. This product offers a

low-power alternative to 5-V PECL drivers with similar

signal levels. Any of the four current-mode drivers will

deliver a minimum differential output voltage

magnitude of 540 mV into a 100-W load when

enabled by either an active-low or active-high enable

input.

The intended application of this device and signaling

technique is for both point-to-point and multiplexed

baseband data transmission over controlled

impedance media of approximately 100 W. The

transmission media may be printed-circuit board

traces, backplanes, or cables. The ultimate rate and

distance of data transfer is dependent upon the

attenuation characteristics of the media and the noise

coupling to the environment.

The SN65LVDM31 is characterized for operation from

–40°C to 85°C.

更新時(shí)間:2025-9-21 19:15:00
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