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FEATURES

· Low-Voltage Differential Driver and Receiver

for Half-Duplex Operation

· Designed for Signaling Rates of 400 Mbit/s

· ESD Protection Exceeds 15 kV on Bus Pins

· Operates From a Single 3.3-V Supply

· Low-Voltage Differential Signaling With

Typical Output Voltages of 350 mV and a

50-W Load

· Valid Output With as Little as 50 mV Input

Voltage Difference

· Propagation Delay Times

– Driver: 1.7 ns Typ

– Receiver: 3.7 ns Typ

· Power Dissipation at 200 MHz

– Driver: 50 mW Typical

– Receiver: 60 mW Typical

· LVTTL Levels Are 5-V Tolerant

· Bus Pins Are High Impedance When Disabled

or With VCC Less Than 1.5 V

· Open-Circuit Fail-Safe Receiver

· Surface-Mount Packaging

– D Package (SOIC)

– DGK Package (MSOP)

DESCRIPTION

The SN65LVDM176 is a differential line driver and receiver configured as a transceiver that uses low-voltage

differential signaling (LVDS) to achieve signaling rates as high as 400 Mbit/s. These circuits are similar to

TIA/EIA-644 standard compliant devices (SN65LVDS) counterparts except that the output current of the drivers is

doubled. This modification provides a minimum differential output voltage magnitude of 247 mV into a 50-W load

and allows double-terminated lines and half-duplex operation. The receivers detect a voltage difference of less

than 50 mV with up to 1 V of ground potential difference between a transmitter and receiver.

The intended application of this device and signaling technique is for half-duplex or multiplex baseband data

transmission over controlled impedance media of approximately 100-W characteristic impedance. The

transmission media may be printed-circuit board traces, backplanes, or cables. (Note: The ultimate rate and

distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the

environment, and other application specific characteristics).

The SN65LVDM176 is characterized for operation from –40°C to 85°C.