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1FEATURES

· 3ns (TYP) Propagation Delay

· Operating Range: VCC = 4.2 V to 5.7 V with

GND = 0 V

· 24-mA TTL Output

· Deterministic Output Value for Open Input

Conditions or When Inputs < 1.3 V

· Built-In Temperature Compensation

· Drop-In Compatible to the MC10ELT21,

MC100ELT21

APPLICATIONS

· Data and Clock Transmission Over Backplane

· Signaling Level Conversion for Clock or Data

DESCRIPTION

The SN65ELT21 is a differential PECL-to-TTL

translator. It operates on +5-V supply and ground

only. The device includes circuitry to maintain Q to a

low logic level when inputs are in an open condition

or < 1.3 V.

The VBB pin is a reference voltage output for the

device. When the device is used in single-ended

mode, the unused input should be tied to VBB. This

reference voltage can also be used to bias the input

when it is ac coupled. When it is used, place a

0.01mF decoupling capacitor between VCC and VBB.

Also limit the sink/source current to < 0.5 mA to VBB.

Leave VBB open when it is not used.

The SN65ELT21 is housed in an industry standard

SOIC-8 package and is also available in an optional