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位置:PCI2040PGEG4.A > PCI2040PGEG4.A詳情

PCI2040PGEG4.A中文資料

廠家型號

PCI2040PGEG4.A

文件大小

395.91Kbytes

頁面數(shù)量

79

功能描述

PCI-DSP Bridge Controller

數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

生產(chǎn)廠商

TI2

PCI2040PGEG4.A數(shù)據(jù)手冊規(guī)格書PDF詳情

1.1 Description

The TI PCI2040 is a PCI-DSP bridge that provides a glueless connection between the 8-bit host port interface (HPI)

port on the TMS320C54X or the 16-bit HPI port on TMS320C6X to the high performance PCI bus. It provides a PCI

bus target interface compliant with the PCI Local Bus Specification.

The PCI2040 provides several external interfaces: the PCI bus interface with compact PCI support, the HPI port

interface with support for up to four DSPs, a serial ROM interface, a general-purpose input/output interface (GPIOs),

and a 16-bit general-purpose bus to provide a glueless interface to TI JTAG test bus controller (TBC). The PCI2040

universal target-only PCI interface is compatible with 3.3-V or 5-V signaling environments.

The PCI2040 interfaces with DSPs via a data bus (HPI port). The PCI2040 also provides a serial ROM interface for

preloading several registers including the subsystem ID and subsystem vendor ID.

The PCI2040, compliant with the latest PCI Bus Power Management Interface Specification, provides several

low-power features that reduce power consumption. Furthermore, an advanced CMOS process achieves low system

power consumption.

Unused PCI2040 inputs must be pulled to a valid logic level using a pullup resistor.

1.2 Features

The PCI2040 supports the following features:

? PCI bus target only, supporting both single-word reads and writes

? Write transaction posting for improved PCI bus performance

? Provides glueless interface to host port interface (HPI) port of C54x and/or C6x

? Up to four DSP devices on HPI

? Allows direct access to program and control external devices connected to PCI2040

? Serial ROM interface for loading subsystem ID and subsystem vendor ID

? A 16-bit general-purpose bus (GPB) that provides glueless interface to TI JTAG TBC

? 3.3-V core logic with universal PCI interface compatible with 3.3-V or 5-V signaling environments

? Advanced submicron, low-power CMOS technology

? 144-pin device and choice of surface mount packaging: TQFP or 12 mm x 12 mm MicroStar BGA

? Up to 33 MHz PCI bus frequency

更新時(shí)間:2025-9-21 11:00:00
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