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1 Features

1? Two-Channel Bidirectional Buffer

? I2C Bus and SMBus Compatible

? Operating Supply Voltage Range of 0.9 V to 5.5 V

on A Side

? Operating Supply Voltage Range of 2.7 V to 5.5 V

on B Side

? Voltage-Level Translation From 0.9 V to 5.5 V and

2.7 V to 5.5 V

? Footprint and Function Replacement for

PCA9515A

? Active-High Repeater-Enable Input

? Open-Drain I2C I/O

? 5.5-V Tolerant I2C and Enable Input Support

Mixed-Mode Signal Operation

? Lockup-Free Operation

? Accommodates Standard Mode and Fast Mode

I2C Devices and Multiple Masters

? Powered-Off High-Impedance I2C Pins

? 400-kHz Fast I2C Bus

? Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

? ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

2 Description

This dual bidirectional I2C buffer is operational at

2.7 V to 5.5 V.

The PCA9517 is a BiCMOS integrated circuit

intended for I2C bus and SMBus systems. It can also provide bidirectional voltage-level translation (up-

translation/down-translation) between low voltages

(down to 0.9 V) and higher voltages (2.7 V to 5.5 V)

in mixed-mode applications. This device enables I2C

and similar bus systems to be extended, without

degradation of performance even during level shifting.

The PCA9517 buffers both the serial data (SDA) and

the serial clock (SCL) signals on the I2C bus, thus

allowing two buses of 400-pF bus capacitance to be connected in an I2C application. This device can also

be used to isolate two halves of a bus for voltage and

capacitance.

The PCA9517 has two types of drivers—A-side

drivers and B-side drivers. All inputs and I/Os are

overvoltage tolerant to 5.5 V, even when the device is

unpowered (VCCB and/or VCCA = 0 V).

The PCA9517 doesnot support clock stretching and

arbitration across the repeater.