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位置:DS92LV18TVVSLASHNOPB.A > DS92LV18TVVSLASHNOPB.A詳情

DS92LV18TVVSLASHNOPB.A中文資料

廠家型號

DS92LV18TVVSLASHNOPB.A

文件大小

1058.12Kbytes

頁面數(shù)量

29

功能描述

DS92LV18 18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz

數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

生產(chǎn)廠商

TI2

DS92LV18TVVSLASHNOPB.A數(shù)據(jù)手冊規(guī)格書PDF詳情

1FEATURES

2? 15–66 MHz 18:1/1:18 Serializer/Deserializer

(2.376 Gbps Full Duplex Throughput)

? Independent Transmitter and Receiver

Operation with Separate Clock, Enable, and

Power Down Pins

? Hot Plug Protection (Power Up High

Impedance) and Synchronization (Receiver

Locks to Random Data)

? Wide ±5% Reference Clock Frequency

Tolerance for Easy System Design Using

Locally-Generated Clocks

? Line and Local Loopback Modes

? Robust BLVDS Serial Transmission Across

Backplanes and Cables for Low EMI

? No External Coding Required

? Internal PLL, No External PLL Components

Required

? Single +3.3V Power Supply

? Low Power: 90mA (typ) Transmitter, 100mA

(typ) at 66 MHz with PRBS-15 Pattern

? ±100 mV Receiver Input Threshold

? Loss of Lock Detection and Reporting Pin

? Industrial ?40 to +85°C Temperature Range

? >2.0kV HBM ESD

? Compact, Standard 80-Pin LQFP Package

DESCRIPTION

The DS92LV18 Serializer/Deserializer (SERDES) pair

transparently translates a 18–bit parallel bus into a

BLVDS serial stream with embedded clock

information. This single serial stream simplifies

transferring a 18-bit, or less, bus over PCB traces

and cables by eliminating the skew problems

between parallel data and clock paths. It saves

system cost by narrowing data paths that in turn

reduce PCB layers, cable width, and connector size

and pins.

This SERDES pair includes built-in system and

device test capability. The line loopback feature

enables the user to check the integrity of the serial

data transmission paths of the transmitter and

receiver while deserializing the serial data to parallel

data at the receiver outputs. The local loopback

feature enables the user to check the integrity of the

transceiver from the local parallel-bus side.

The DS92LV18 incorporates modified BLVDS

signaling on the high-speed I/O. BLVDS provides a

low power and low noise environment for reliably

transferring data over a serial transmission path. The

equal and opposite currents through the differential

data path control EMI by coupling the resulting

fringing fields together.

更新時間:2025-9-22 8:04:00
供應商 型號 品牌 批號 封裝 庫存 備注 價格
NSC
2013
QFP
500
全新
NS
23+
QFP80
50000
全新原裝正品現(xiàn)貨,支持訂貨
TI
25+
QFP
8880
原裝認準芯澤盛世!
HARRIS/哈里斯
23+
QFP
9920
原裝正品,支持實單
HARRIS/哈里斯
21+
QFP
19600
一站式BOM配單
TI
1527+
QFP
9
一級代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力
TI
23+
QFP
3200
正規(guī)渠道,只有原裝!
TI/德州儀器
24+
QFP
1500
只供應原裝正品 歡迎詢價
22+
5000
TI
23+
QFP
5000
全新原裝,支持實單,非誠勿擾