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位置:DS14C89AMSLASHNOPB.B > DS14C89AMSLASHNOPB.B詳情

DS14C89AMSLASHNOPB.B中文資料

廠家型號(hào)

DS14C89AMSLASHNOPB.B

文件大小

411.3Kbytes

頁面數(shù)量

15

功能描述

DS14C89A Quad CMOS Receiver

數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

生產(chǎn)廠商

TI2

DS14C89AMSLASHNOPB.B數(shù)據(jù)手冊(cè)規(guī)格書PDF詳情

1FEATURES

2? Meets EIA/TIA-232-E and CCITT V.28

Standards

? Failsafe - Output High for Open Input

? LOW Power Consumption

? On Chip Noise Filter

? Available in SOIC Package

DESCRIPTION

The DS14C89A, pin-for-pin compatible to the

DS1489A/MC1489A, ia a quad receiver designed to

interface data terminal equipment (DTE) with data

circuit-terminating equipment (DCE). These devices

translate levels conforming to EIA-232E and CCITT

V.28 standards to TTL/CMOS logic levels.

The device is fabricated in low threshold CMOS metal

gate technology. The device provides very low power

consumption compared to their bipolar equivalents:

900 μA (DS14C89A) versus 26 mA (DS1489A).

The DS14C89A provides on chip noise filtering which

eliminates the need for external response control filter

capacitors. When replacing the DS1489A with the

DS14C89A, the response control filter pins can be

tied high, low, or not connected.

更新時(shí)間:2025-9-21 19:15:00
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